DS3134 datasheet(182/203 Pages) DALLAS

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DS3134

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Shift-IR

In this state, the shift register in the Instruction register is connected between JTDI and JTDO and shifts

data one stage for every rising edge of JTCLK towards the serial output. The parallel register, as well as

all Test registers remains at their previous states. A rising edge on JTCLK with JTMS high will move the

controller to the Exit1-IR state. A rising edge on JTCLK with JTMS low will keep the controller in the

Shift-IR state while moving data one stage through the Instruction shift register.

Exit1-IR

A rising edge on JTCLK with JTMS low will put the controller in the Pause-IR state. If JTMS is high on

the rising edge of JTCLK, the controller will enter the Update-IR state and terminate the scanning

process.

Pause-IR

Shifting of the Instruction register is halted temporarily. With JTMS high, a rising edge on JTCLK will

put the controller in the Exit2-IR state. The controller will remain in the Pause-IR state if JTMS is low

during a rising edge on JTCLK.

Exit2-IR

A rising edge on JTCLK with JTMS low will put the controller in the Update-IR state. The controller

will loop back to the Shift-IR state if JTMS is high during a rising edge of JTCLK in this state.

Update-IR

The instruction shifted into the Instruction shift register is latched into the parallel output on the falling

edge of JTCLK as the controller enters this state. Once latched, this instruction becomes the current

instruction. A rising edge on JTCLK with JTMS low will put the controller in the Run-Test-Idle state.

With JTMS high, the controller will enter the Select-DR-Scan state.

11.3 INSTRUCTION REGISTER AND INSTRUCTIONS

The Instruction register contains a shift register as well as a latched parallel output and is 3 bits in length.

When the TAP controller enters the Shift-IR state, the instruction shift register will be connected between

JTDI and JTDO. While in the Shift-IR state, a rising edge on JTCLK with JTMS low will shift data one

stage towards the serial output at JTDO. A rising edge on JTCLK in the Exit1-IR state or the Exit2-IR

state with JTMS high will move the controller to the Update-IR state. The falling edge of that same

JTCLK will latch the data in the instruction shift register to the instruction parallel output. Instructions

supported by the DS3134 and their respective operational binary codes are shown in Table 11.3A.

Instruction Codes Table 11.3A

Instructions

Selected Register

Instruction Codes

SAMPLE/PRELOAD

Boundary Scan

010

BYPASS

Bypass

111

EXTEST

Boundary Scan

000

CLAMP

Boundary Scan

011

HIGHZ

Boundary Scan

100

IDCODE

Device Identification

001

DS3134 Datasheet(PDF) 182 Page - Dallas Semiconductor

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