AD9121 datasheet(10/61 Pages) AD

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Data Sheet

AD9121

Rev. B | Page 9 of 60

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

CVDD18

DACCLKP

DACCLKN

CVSS

FRAMEP

FRAMEN

IRQ

D13P

D13N

IOVDD

DVDD18

D12P

D12N

D11P

D11N

D10P

D10N

RESET

SCLK

SDIO

SDO

DVDD18

NC/BYTELSBN

NC/BYTELSBP

DVSS

DVDD18

D0N

D0P

D1N

D1P

D2N

D2P

PIN 1

INDICATOR

AD9121

TOP VIEW

(Not to Scale)

NOTES

1. EXPOSED PAD (EPAD) MUST BE SOLDERED TO THE GROUND PLANE (AVSS).

THE EPAD PROVIDES AN ELECTRICAL, THERMAL, AND MECHANICAL

CONNECTION TO THE BOARD.

2. PINS LABELED NC CAN BE ALLOWED TO FLOAT, BUT IT IS BETTER TO CONNECT

THESE PINS TO GROUND. AVOID ROUTING HIGH SPEED SIGNALS THROUGH

THESE PINS BECAUSE NOISE COUPLING MAY RESULT.

Figure 3. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Description

CVDD18

1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.

DACCLKP

DAC Clock Input, Positive.

DACCLKN

DAC Clock Input, Negative.

CVSS

Clock Supply Common.

FRAMEP

Frame Input, Positive. This pin must be tied to DVSS if not used.

FRAMEN

Frame Input, Negative. This pin must be tiedto DVDD18 if not used.

IRQ

Interrupt Request. Open-drain, active low output. Connect an external pull-up to IOVDD through a 10 kΩ

resistor.

D13P

Data Bit 13 (MSB), Positive.

D13N

Data Bit 13 (MSB), Negative.

This pin is not connected internally (see Figure 3).

IOVDD

Supply Pinfor Serial Port I/O Pins, RESET, and IRQ. 1.8 V to 3.3 V can be suppliedto this pin.

DVDD18

1.8 V Digital Supply. Supplies power to digital core and digital data ports.

D12P

Data Bit 12, Positive.

D12N

Data Bit 12, Negative.

D11P

Data Bit 11, Positive.

D11N

Data Bit 11, Negative.

D10P

Data Bit 10, Positive.

D10N

Data Bit 10, Negative.

D9P

Data Bit 9, Positive.

D9N

Data Bit 9, Negative.

D8P

Data Bit 8, Positive.

D8N

Data Bit 8, Negative.

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