ST72754 datasheet(66/144 Pages) STMICROELECTRONICS

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ST72774/ST727754/ST72734

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SYNC PROCESSOR (SYNC) (Cont’d)

4.4.8.2 Vertical Output Measurement

The function of vertical pulse measurement is to:

– Capture the number of HSYNCO pulses during

a Low level of VSYNCO.

– Capture the number of HFBACK pulses during a

Low level of VFBACK (maximum accuracy).

Start the measurement by setting VACQ in the

CFGR. When the measurement is completed this

bit is cleared by hardware. The VGENR and CFGR

registers return the result.

The algorithm is shown in Figure 46.

HLine = 2048 - (V11bits)

Hline maximum value = 2048 (even if real value is

greater)

V11bits = VGENR(8 MSB) and Q'2,Q'1,Q'0 (3

LSB). Refer to Figure 44.

Note: In case of pre/post equalization pulses, set the

2FHINH bit in the CFGR register.

4.4.8.3 Detection of pre equalization pulses

This function uses two bits:

– 2FHDET in POLR register continuously updated

by hardware

– 2FHLAT in LATR register set by hardware when

a higher frequency is detected and reset by soft-

ware

A measurement of the low level of HSYNCO is

necessary before reading this information.

Note: Reset the 2FHLAT bit in the LATR register on the

third Hsync pulse after the Vsync pulse.

Figure 46. Vertical Output Measurement

VR02118B

END

VGENR & CFGR=Result

VACQ=0?

Measure H Lines

Disable V correction Mode

VCORDIS=1, VEXT=0

Disable H internal generation

HVGEN=0

H & VSYNCO Positive polarity

Necessary if Signals

are H/VSYNCO

Select H/VBACK or H/VSYNCO

FBSEL=0 or 1

VACQ=1

Start measurement

Yes

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