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16F630 Datasheet(PDF) 63 Page - Microchip Technology |
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16F630 Datasheet(HTML) 63 Page - Microchip Technology |
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63 / 132 page ![]() 2003 Microchip Technology Inc. DS40039C-page 61 PIC16F630/676 TABLE 9-7: INITIALIZATION CONDITION FOR REGISTERS Register Address Power-on Reset •MCLR Reset • WDT Reset • Brown-out Detect(1) • Wake-up from SLEEP through interrupt • Wake-up from SLEEP through WDT time-out W— xxxx xxxx uuuu uuuu uuuu uuuu INDF 00h/80h — — — TMR0 01h xxxx xxxx uuuu uuuu uuuu uuuu PCL 02h/82h 0000 0000 0000 0000 PC + 1(3) STATUS 03h/83h 0001 1xxx 000q quuu(4) uuuq quuu(4) FSR 04h/84h xxxx xxxx uuuu uuuu uuuu uuuu PORTA 05h --xx xxxx --uu uuuu --uu uuuu PORTC 07h --xx xxxx --uu uuuu --uu uuuu PCLATH 0Ah/8Ah ---0 0000 ---0 0000 ---u uuuu INTCON 0Bh/8Bh 0000 0000 0000 000u uuuu uuqq(2) PIR1 0Ch 00-- 0--0 00-- 0--0 qq-- q--q(2,5) T1CON 10h -000 0000 -uuu uuuu -uuu uuuu CMCON 19h -0-0 0000 -0-0 0000 -u-u uuuu ADRESH 1Eh xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 1Fh 00-0 0000 00-0 0000 uu-u uuuu OPTION_REG 81h 1111 1111 1111 1111 uuuu uuuu TRISA 85h --11 1111 --11 1111 --uu uuuu TRISC 87h --11 1111 --11 1111 --uu uuuu PIE1 8Ch 00-- 0--0 00-- 0--0 uu-- u--u PCON 8Eh ---- --0x ---- --uu(1,6) ---- --uu OSCCAL 90h 1000 00-- 1000 00-- uuuu uu-- ANSEL 91h 1111 1111 1111 1111 uuuu uuuu WPUA 95h --11 -111 --11 -111 uuuu uuuu IOCA 96h --00 0000 --00 0000 --uu uuuu VRCON 99h 0-0- 0000 0-0- 0000 u-u- uuuu EEDATA 9Ah 0000 0000 0000 0000 uuuu uuuu EEADR 9Bh -000 0000 -000 0000 -uuu uuuu EECON1 9Ch ---- x000 ---- q000 ---- uuuu EECON2 9Dh ---- ---- ---- ---- ---- ---- ADRESL 9Eh xxxx xxxx uuuu uuuu uuuu uuuu ADCON1 9Fh -000 ---- -000 ---- -uuu ---- Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition. Note 1: If V DD goes too low, Power-on Reset will be activated and registers will be affected differently. 2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up). 3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 4: See Table 9-6 for RESET value for specific condition. 5: If wake-up was due to data EEPROM write completing, bit 7 = 1; A/D conversion completing, bit 6 = 1; Comparator input changing, bit 3 = 1; or Timer1 rolling over, bit 0 = 1. All other interrupts generating a wake-up will cause these bits to = u. 6: If RESET was due to brown-out, then bit 0 = 0. All other RESETS will cause bit 0 = u. |
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