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16F630 Datasheet(PDF) 12 Page - Microchip Technology |
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16F630 Datasheet(HTML) 12 Page - Microchip Technology |
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12 / 132 page  PIC16F630/676 DS40039C-page 10 2003 Microchip Technology Inc. TABLE 2-2: PIC16F630/676 SPECIAL FUNCTION REGISTERS SUMMARY BANK 1 Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOD Page Bank 1 80h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 18,61 81h OPTION_REG RAPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 12,30 82h PCL Program Counter's (PC) Least Significant Byte 0000 0000 17 83h STATUS IRP(2) RP1(2) RP0 TO PD ZDC C 0001 1xxx 11 84h FSR Indirect data memory address pointer xxxx xxxx 18 85h TRISA — — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 19 86h — Unimplemented — — 87h TRISC — — TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 --11 1111 — 88h — Unimplemented — — 89h — Unimplemented — — 8Ah PCLATH — — — Write buffer for upper 5 bits of program counter ---0 0000 17 8Bh INTCON GIE PEIE T0IE INTE RAIE T0IF INTF RAIF 0000 0000 13 8Ch PIE1 EEIE ADIE — — CMIE — — TMR1IE 00-- 0--0 14 8Dh — Unimplemented — — 8Eh PCON — — — — — — POR BOD ---- --qq 16 8Fh — — 90h OSCCAL CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 — — 1000 00-- 16 91h ANSEL(3) ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 1111 1111 46 92h — Unimplemented — — 93h — Unimplemented — — 94h — Unimplemented — — 95h WPUA — — WPUA5 WPUA4 — WPUA2 WPUA1 WPUA0 --11 -111 20 96h IOCA — — IOCA5 IOCA4 IOCA3 IOCA2 IOCA1 IOCA0 --00 0000 21 97h — Unimplemented — — 98h — Unimplemented — — 99h VRCON VREN —VRR — VR3 VR2 VR1 VR0 0-0- 0000 42 9Ah EEDAT EEPROM data register 0000 0000 49 9Bh EEADR — EEPROM address register 0000 0000 49 9Ch EECON1 — — — — WRERR WREN WR RD ---- x000 50 9Dh EECON2 EEPROM control register 2 (not a physical register) ---- ---- 49 9Eh ADRESL(3) Least Significant 2 bits of the left shifted result or 8 bits of the right shifted result xxxx xxxx 44 9Fh ADCON1(3) — ADCS2 ADCS1 ADCS0 — — — — -000 ---- 45,61 Legend: — = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during normal operation. 2: IRP & RP1 bits are reserved, always maintain these bits clear. 3: PIC16F676 only. |
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