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PM5347 Datasheet(PDF) 104 Page - PMC-Sierra, Inc |
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PM5347 Datasheet(HTML) 104 Page - PMC-Sierra, Inc |
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104 / 302 page ![]() PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 88 Register 0x05: S/UNI-PLUS Clock Synthesis Control and Status Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 R TROOLV X Bit 2 R TROOLI X Bit 1 R/W TROOLE 0 Bit 0 R/W TREFSEL 0 This register controls the clock synthesis and reports the state of the transmit phase locked loop. TREFSEL: The transmit reference select (TREFSEL) bit determines the expected frequency of TRCLK+/- to synthesize the line clock frequency. If TREFSEL is a logic zero, the reference frequency must be 19.44 MHz. If TREFSEL is a logic one, the reference frequency must be 6.48 MHz. TREFSEL only has effect if the TBYP input is low. TROOLE: The TROOLE bit is an interrupt enable for the transmit reference out of lock status. When TROOLE is a logic one, an interrupt is generated when the TROOLV bit changes state. TROOLI: The TROOLI bit is the transmit reference out of lock interrupt status bit. TROOLI is a logic one when the TROOLV bit changes state. TROOLI is cleared when this register is read. TROOLV: The transmit reference out of lock status indicates the clock synthesis phase locked loop is unable to lock to the reference. TROOLV is a logic one if the |
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