PM5347 datasheet(106/302 Pages) PMC

106 / 302 page

PM5347 S/UNI-PLUS

DATA SHEET

PMC-941033

ISSUE 6

SATURN USER NETWORK INTERFACE PLUS

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

Unused

Bit 5

Unused

Bit 4

RROOLV

Bit 3

RDOOLV

Bit 2

RDOOLI

Bit 1

R/W

RDOOLE

Bit 0

R/W

RREFSEL

This register controls the clock recovery and reports the state of the receive

phase locked loop.

RREFSEL:

The receive reference select (RREFSEL) bit determines the expected

frequency of RRCLK+/-. If RREFSEL is a logic zero, the reference frequency

is 19.44 MHz. If RREFSEL is a logic one, the reference frequency must be

6.48 MHz. RREFSEL only has effect if the RBYP input is low.

RDOOLE:

The RDOOLE bit is an interrupt enable for the receive data out of lock status.

When RDOOLE is a logic one, an interrupt is generated when the RDOOLV

bit changes state.

RDOOLI:

The RDOOLI bit is the receive data out of lock interrupt status bit. RDOOLI is

a logic one when the RDOOLV bit changes state. RDOOLI is cleared when

this register is read.

RDOOLV:

The receive data out of lock status indicates the clock recovery phase locked

loop is unable to lock to the receive stream. RDOOLV is a logic one if the

divided down recovered clock frequency not within 488 ppm of the RRCLK+/-

PM5347 Datasheet(PDF) 106 Page - PMC-Sierra, Inc

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