LAN9211 datasheet(104/147 Pages) SMSC

104 / 147 page

High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

Datasheet

Revision 2.9 (03-01-12)

104

SMSC LAN9211

DATASHEET

5.4

MAC Control and Status Registers

These registers are located in the MAC module and are accessed indirectly through the MAC-CSR

synchronizer port. Table 5.6, "MAC CSR Register Map", shown below, lists the MAC registers that are

accessible through the indexing method using the MAC_CSR_CMD and MAC_CSR_DATA registers

(see sections MAC_CSR_CMD – MAC CSR Synchronizer Command Register and MAC_CSR_DATA

– MAC CSR Synchronizer Data Register).

Table 5.6 MAC CSR Register Map

MAC CONTROL AND STATUS REGISTERS

INDEX

SYMBOL

DEFAULT

1MAC_CR

MAC Control Register

00040000h

ADDRH

MAC Address High

0000FFFFh

ADDRL

MAC Address Low

FFFFFFFFh

HASHH

Multicast Hash Table High

00000000h

HASHL

Multicast Hash Table Low

00000000h

6MII_ACC

MII Access

00000000h

MII_DATA

MII Data

00000000h

8FLOW

Flow Control

00000000h

9VLAN1

VLAN1 Tag

00000000h

AVLAN2

VLAN2 Tag

00000000h

BWUFF

Wake-up Frame Filter

00000000h

CWUCSR

Wake-up Control and Status

00000000h

DCOE_CR

Checksum Offload Engine Control

00000000h

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