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LAN9211 Datasheet(PDF) 110 Page - SMSC Corporation

Part # LAN9211
Description  High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
PDF  147 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9211 Datasheet(HTML) 110 Page - SMSC Corporation

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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
Revision 2.9 (03-01-12)
110
SMSC LAN9211
DATASHEET
Note: By convention, the left most byte of the Ethernet address (in this example 0x12) is the most
significant byte and is transmitted/received first.
5.4.4
HASHH—Multicast Hash Table High Register
The 64-bit Multicast table is used for group address filtering. For hash filtering, the contents of the
destination address in the incoming frame is used to index the contents of the Hash table. The most
significant bit determines the register to be used (Hi/Low), while the other five bits determine the bit
within the register. A value of 00000 selects Bit 0 of the Multicast Hash Table Lo register and a value
of 11111 selects the Bit 31 of the Multicast Hash Table Hi register.
If the corresponding bit is 1, then the multicast frame is accepted. Otherwise, it is rejected. If the “Pass All
Multicast” (MCPAS) bit is set (1), then all multicast frames are accepted regardless of the multicast hash
values.
The Multicast Hash Table Hi register contains the higher 32 bits of the hash table and the Multicast
Hash Table Low register contains the lower 32 bits of the hash table.
5.4.5
HASHL—Multicast Hash Table Low Register
This register defines the lower 32-bits of the Multicast Hash Table. Please refer to Table 5.4.4,
"HASHH—Multicast Hash Table High Register" for further details.
Offset:
4
Attribute:
R/W
Default Value:
00000000h
Size:
32 bits
BITS
DESCRIPTION
31-0
Upper 32 bits of the 64-bit Hash Table
Offset:
5
Attribute:
R/W
Default Value:
00000000h
Size:
32 bits
BITS
DESCRIPTION
31-0
Lower 32 bits of the 64-bit Hash Table



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