LAN9211 datasheet(143/147 Pages) SMSC

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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

Datasheet

SMSC LAN9211

143

Revision 2.9 (03-01-12)

DATASHEET

7.7

Clock Circuit

The LAN9211 can accept either a 25MHz crystal (preferred) or a 25 MHz single-ended clock oscillator

(

±50 PPM) input. The LAN9211 shares the 25MHz clock oscillator input (CLKIN) with the crystal input

XTAL1/CLKIN. If the single-ended clock oscillator method is implemented, XTAL2 should be left

unconnected and CLKIN should be driven with a nominal 0-3.3V clock signal. The input clock duty

cycle is 40% minimum, 50% typical and 60% maximum.

It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN9211

crystal input/output signals (XTAL1, XTAL2). See Table 7.7, "LAN9211 Crystal Specifications" for crystal

specifications. Refer to application note AN10.7 - “Parallel Crystal Circuit Input Voltage Control” for

additional information.

Note 7.11 The maximum allowable values for Frequency Tolerance and Frequency Stability are

application dependant. Since any particular application must meet the IEEE +/-50 PPM

Total PPM Budget, the combination of these two values must be approximately +/-45 PPM

(allowing for aging).

Note 7.12 Frequency Deviation Over Time is also referred to as Aging.

Note 7.13 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as

+/- 50 PPM.

Note 7.14 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not

included in this value. The XTAL1/CLKIN and XTAL2 pin and PCB capacitance values are

required to accurately calculate the value of the two external load capacitors. These two

external load capacitors determine the accuracy of the 25.000 MHz frequency.

Table 7.7 LAN9211 Crystal Specifications

PARAMETER

SYMBOL

MIN

NOM

MAX

UNITS

NOTES

Crystal Cut

AT, typ

Crystal Oscillation Mode

Fundamental Mode

Crystal Calibration Mode

Parallel Resonant Mode

Frequency

Ffund

25.000

MHz

Frequency Tolerance @ 25oCFtol

+/-50

PPM

Note 7.11

Frequency Stability Over Temp

Ftemp

+/-50

PPM

Note 7.11

Frequency Deviation Over Time

Fage

+/-3 to 5

PPM

Note 7.12

Total Allowable PPM Budget

+/-50

PPM

Note 7.13

Shunt Capacitance

-7 typ-

Load Capacitance

20 typ

Drive Level

300

Equivalent Series Resistance

Ohm

Operating Temperature Range

+70

LAN9211 XTAL1/CLKIN Pin

Capacitance

-3 typ-

Note 7.14

LAN9211 XTAL2 Pin

Capacitance

-3 typ-

Note 7.14

LAN9211 Datasheet(PDF) 143 Page - SMSC Corporation

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