LAN9211 datasheet(147/147 Pages) SMSC

147 / 147 page

High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

Datasheet

SMSC LAN9211

147

Revision 2.9 (03-01-12)

DATASHEET

Rev. 2.3

(08-18-08)

Note 7.6 on page 142

Note following I/O Buffer Characteristics table

modified:

Changed from: ".....the per-pin input leakage is 10

divided by the maximum input leakage current."

to: ".....the per-pin input leakage is the maximum

input leakage current divided by 10."

Rev. 2.2

(06-19-08)

Figure 1.2, "Internal Block

Diagram"

Diagram redone.

The word “Core” was added to the regulator block

title.

Table 2.4, “System and

Power Signals,” on page 17

Changed VDD_CORE/VDD18CORE bulk

capacitor value from 10uF to 4.7uF.

Rev. 2.2

(06-10-08)

Auto-negotiation

Advertisement on page 119

Bits 9 and 15 relabeled as Reserved, Read-Only

(RO), with a default of 0.

Auto-negotiation

Advertisement on page 119

Fixed definition of bits 11:10 when equal to “11” by

adding “advertise support for..” to beginning of

definition. Also added note stating “When both

symmetric PAUSE and asymmetric PAUSE

support are advertised, the device will only be

configured to, at most, one of the two settings

upon auto-negotiation completion.”

Section 3.5, "Wake-up

Frame Detection," on

page 25 and Section 5.4.1,

"MAC_CR—MAC Control

Added note: “When wake-up frame detection is

enabled via the WUEN bit of the WUCSR—Wake-

up Control and Status Register, a broadcast wake-

up frame will wake-up the device despite the state

of the Disable Broadcast Frame (BCAST) bit in the

MAC_CR—MAC Control Register.”

Section 5.4.12,

"WUCSR—Wake-up Control

and Status Register," on

page 114

Fixed typo in bit 9: “... Mac Address [1:0] bit set to

0.” was changed to “...Mac Address [0] bit set to 0.”

Section 3.6.1.1, "RX

Checksum Calculation," on

page 31

“checksum = [B0, B1] + C0 + [B2, B3] + C1 + …

+ [0, BN] + CN-1” changed to “checksum = [B1,

B0] + C0 + [B3, B2] + C1 + … + [0, BN] + CN-1”

Table 7.3 on page 140

Added 1.8V Analog Supply Current (VDD_A18)

into the VDD_IO supply current and removed the

1.8V row.

Rev. 2.1

(05-13-08)

Section 1.1, "Block

Diagram"

Removed the system memory block and arrow

above the microprocessor/ microcontroller

Rev. 2.0

(04-11-08)

Section 7.6, "DC Electrical

Specifications," on page 141

Input leakage current values added

Rev. 1.92

(10-22-07)

Chapter 2 Pin Description

and Configurationon

page 14

Pin assignment information re-organized into

separate table.

Transmit Checksum Offload

Engine (TXCOE) section of

Chapter 3, "Functional

Description," on page 21.

Note added indicating the proper usage of the TX

checksum preamble (DWORD alignment).

EECLK pin description in

Chapter 2 Pin Description

and Configurationon

page 14

Note added to EECLK pin description to indicate

proper usage.

Table 9.1 Customer Revision History (continued)

REVISION LEVEL & DATE

SECTION/FIGURE/ENTRY

CORRECTION

LAN9211 Datasheet(PDF) 147 Page - SMSC Corporation

LAN9211 Datasheet(HTML) 147 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL