LAN9211 datasheet(146/147 Pages) SMSC

146 / 147 page

High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

Datasheet

Revision 2.9 (03-01-12)

146

SMSC LAN9211

DATASHEET

Chapter 9 Datasheet Revision History

Table 9.1 Customer Revision History

REVISION LEVEL & DATE

SECTION/FIGURE/ENTRY

CORRECTION

Rev. 2.9

(03-01-12)

Section 5.4.8,

"FLOW—Flow Control

Updated Pass Control Frames (bit 2) description to

“When set, the MAC will pass the pause frame to

the host...”

Rev. 2.8

(07-14-11)

Table 2.4, “System and

Power Signals,” on page 17

nLED1 description modified to indicate that the

signal is driven low when operating speed is

100Mbs and is driven high during autonegotiation,

when the cable is disconnected, and during 10

Mbs operation.

Section 5.2.1, "RX FIFO

Ports," on page 77

RX Data FIFO port is aliased to 16 WORD

locations, not 16 DWORD locations.

Section 5.2.2, "TX FIFO

Ports," on page 77

TX Data FIFO port is aliased to 16 WORD

locations, not 16 DWORD locations.

Section 3.6.2.1, "TX

Checksum Calculation," on

page 32

Added note stating TX Checksum calculation

should not be used for UDP packets under IPv6.

Rev. 2.7

(03-15-10)

Chapter 2, "Pin Description

and Configuration," on

page 14

Added pin 1 designator to pin diagram

Section 7.2, "Operating

Conditions**," on page 137

Added note: “Do not drive input signals without

power supplied to the device.”

Section 7.2, "Operating

Conditions**," on page 137

Added note: “Apply and remove power to all power

supply pins simultaneously, including the Ethernet

magnetics. Do not apply power to individual supply

pins without the others.”

Rev. 2.5

(11-13-08)

All

Fixed various typos

Rev. 2.4

(10-24-08)

All

Fixed various typos

Table 7.1 on page 138,

Table 7.2 on page 139, and

Table 7.3 on page 140

Updated power consumption and supply current

characteristics tables.

Table 7.4, “I/O Buffer

Characteristics,” on

page 141

Added input capacitance values.

Section 3.8, "General

Purpose Timer (GP Timer),"

on page 36

Changed incorrect “GPT_CNT” reference to

“GPT_LOAD”: “On a reset, or when the

TIMER_EN bit changes from set ‘1’ to cleared ‘0,’

the GPT_LOAD field is initialized to FFFFh.”

Section 5.3.23, "E2P_CMD

– EEPROM Command

Corrected MAC Address Loaded (bit 8) type from

“RO” to “R/WC”

Table 7.7 on page 143

Updated crystal specifications:

Drive Level: 300uW

ESR: 50 Ohms.

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