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DSP56156ROM Datasheet(PDF) 11 Page - Motorola, Inc |
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DSP56156ROM Datasheet(HTML) 11 Page - Motorola, Inc |
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11 / 76 page ![]() Pin Descriptions MOTOROLA DSP56156 Data Sheet 11 trigger input is used for noise immunity. When the reset pin is deasserted, the ini- tial chip operating mode is latched from the MODA and MODB pins, and the ini- tial bus operating mode is latched from the MODC pin. The internal reset signal should be deasserted synchronized with the internal clocks. Host Interface H0-H7 (Host Data Bus) — bidirectional. This bidirectional data bus is used to transfer data between the host processor and the DSP. This bus is an input unless enabled by a host processor read. H0-H7 may be programmed as Port B general purpose parallel I/O pins called PB0-PB7 when the Host Interface (HI) is not being used. HA0-HA2 (Host Address 0-2) — input*. These inputs provide the address selection for each HI register and are stable when HEN is asserted. HA0-HA2 may be programmed as Port B general pur- pose parallel I/O pins called PB8-PB10 when the HI is not being used. HR/W (Host Read/Write) — input*. This in- put selects the direction of data transfer for each host processor access. If HR/W is high and HEN is asserted, H0-H7 are outputs and DSP data is transferred to the host processor. If HR/W is low and HEN is asserted, H0-H7 are inputs and host data is transferred to the DSP. When HEN is asserted, HR/W is stable. HR/W may be programmed as a gen- eral purpose I/O pin called PB11 when the HI is not being used. HEN (Host Enable) — input*. This input en- ables a data transfer on the host data bus. When HEN is asserted and HR/W is high, H0-H7 becomes an output and DSP data may be latched by the host processor. When HEN is asserted and HR/W is low, H0-H7 is an input and host data is latched inside the DSP when HEN is deasserted. Normally a chip select signal derived from host ad- dress decoding and an enable clock is connected to the Host Enable. HEN may be programmed as a general pur- pose I/O pin called PB12 when the HI is not being used. HREQ (Host Request) — output*. This open- drain output signal is used by the HI to request service from the host proces- sor. HREQ may be connected to an in- terrupt request pin of a host processor, a transfer request of a DMA controller, or a control input of external circuitry. HREQ is asserted when an enabled re- quest occurs in the HI. HREQ is deas- serted when the enabled request is cleared or masked, DMA HACK is as- serted, or the DSP is reset. HREQ may be programmed as a general purpose I/O pin (not open-drain) called PB13 when the HI is not being used. HACK (Host Acknowledge) — input*. This input has two functions: • to provide a host acknowledge signal for DMA transfers and, • to control handshaking and to pro- vide a host interrupt acknowledge compatible with MC68000 family processors. If programmed as a host acknowledge signal, HACK may be used as a data strobe for HI DMA data transfers. If pro- grammed as an MC68000 host interrupt Host Interface * These pins can be bidirectional when programmed as general purpose I/O. Interrupt and Mode Control Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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