GC4116 datasheet(16/57 Pages) ETC

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GC4116 MULTI-STANDARD QUAD DUC CHIP

DATA SHEET REV 1.0

- 11 -

APRIL 27, 2001

This document contains preliminary information which may be changed at any time without notice

If attenuation is necessary, for example when multiple

channel outputs are to be added together, then the

attenuation should be added as close to the output of the

chip as is possible - preferably only at the end of the sumtree

just prior to going to the D/A.

3.7

FOUR CHANNEL RESAMPLER

The GC4116 contains a resampler which can be used to

feed the up-converter channels in the chip, or can be used as

a general resampling resource for a signal processing

system. The resampler shares the clock to the chip, but its

input, output and control circuitry are independent from the

rest of the chip. The resampler in the GC4116 chip is very

similar to the one in the GC4016 chip.

The resampler requires the use of the Serial Controller

block described in Section 8.

Note that the resampler only works on complex data so

the up converter’s real or split IQ modes, which require two

real samples per complex word, can not use the resampler.

Also, the maximum output sample rate from the resampler is

CK/44 when it is connected to the GC4116’s upconvert

channels. This means the upconvert channels must

interpolate by at least a factor of 44 (N>=11) when using the

resampler.

3.7.1 Resampler Input Format

The resampler inputs are complex samples, 16 bits per

I or Q word. The samples are input to the resampler through

bit-serial input ports, or through memory mapped registers. A

resampler data request signal (RREQ) is output from the chip

to identify when the resampler is ready for another complex

input sample. The request (RREQ) signal may not be

periodic, depending upon the resampling ratio being used.

The bit serial interface to the resampler functions the

same as the serial interface to the channels (see Section 2)

except the resampler does not support real input mode and

the maximum input complex word rate is CK/34.

The Serial Controller is used to tell the resampler input

buffer when the next set of serial samples is ready. The

Serial Controller can also be used to generate the serial

clock and frame strobes for the resampler’s input ports (see

Section 3.8).

3.7.2 Functional Description

The

resampler

consists

input

buffer,

interpolation filter, and an output buffer. A functional block

diagram of the resampler is shown in Figure 12.

The resampler’s sampling rate change is the ratio

NDELAY/NDEC where NDELAY and NDEC are the

interpolation and decimation factors shown in Figure 12. The

decimation amount NDEC is a mixed integer/fractional

number. When NDEC is an integer, then the exact sampling

instance is computed and there is no phase jitter. If NDEC is

fractional, then the desired sampling instance will not be one

of the possible NDELAY interpolated values. Instead the

nearest interpolated sample is used. This introduces a timing

error (jitter) of no more than 1/(2*NDELAY) times the input

sample period.

The input buffer accepts 16 bit data from the serial input

ports or the memory mapped input registers. The input buffer

serves both as a FIFO between the input and the resampler,

and as a data delay line for the interpolation filter. The 64

complex word input buffer can be configured as four

segments of 16 complex words each to support 4 resampler

channels, or as two segments of 32 complex words each to

support 2 resampler channels, or as a single segment of 64

complex words to support a single resampler channel. The

number of segments is set by NCHAN in address 16 of the

resampler control page.

The interpolation filter zero pads the input data by a

factor of NDELAY and then filters the zero padded data using

a QTAP length filter. The output of the QTAP filter is then

decimated by a factor of NDEC.

INPUT

BUFFER

NDELAY

NDEC

OUTPUT

Interpolation Filter

Fractional

Decimation

Resampling Filter

QTAP Filter Coefs

Figure 12. Resampler Channel Block Diagram

BUFFER

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