M83 datasheet(22/441 Pages) MITSUBISHI

22 / 441 page

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development

Rev.B2 for proof reading

Mitsubishi Microcomputers

M32C/83 group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Processor Mode

(10) Vector register (VCT)

This register consists of 24 bits and is used to indicate the jump address when a high-speed interrupt is

generated.

(11) DMA mode registers (DMD0/DMD1)

These registers consist of 8 bits and are used to set the transfer mode, etc. for DMA.

(12) DMA transfer count registers (DCT0/DCT1)

These registers consist of 16 bits and are used to set the number of DMA transfers performed.

(13) DMA transfer count reload registers (DRC0/DRC1)

These registers consist of 16 bits and are used to reload the DMA transfer count registers.

(14) DMA memory address registers (DMA0/DMA1)

These registers consist of 24 bits and are used to set a memory address at the source or destination of

DMA transfer.

(15) DMA SFR address registers (DSA0/DSA1)

These registers consist of 24 bits and are used to set a fixed address at the source or destination of DMA

transfer.

(16) DMA memory address reload registers (DRA0/DRA1)

These registers consist of 24 bits and are used to reload the DMA memory address registers.

(17) Flag register (FLG)

Flag register (FLG) is configured with 11 bits, each bit is used as a flag. Figure 1.3.2 shows the flag

• Bit 0: Carry flag (C)

This flag retains a carry, borrow, or shift-out bit that has occurred in the arithmetic/logic unit.

• Bit 1: Debug flag (D)

This flag enables a single-step interrupt.

When this flag is “1”, a single-step interrupt is generated after instruction execution. This flag is

cleared to “0” when the interrupt is acknowledged.

• Bit 2: Zero flag (Z)

This flag is set to “1” when an arithmetic operation resulted in 0; otherwise, cleared to “0”.

• Bit 3: Sign flag (S)

This flag is set to “1” when an arithmetic operation resulted in a negative value; otherwise, cleared to

“0”.

M83 Datasheet(PDF) 22 Page - Mitsubishi Electric Semiconductor