M83 datasheet(56/441 Pages) MITSUBISHI

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Rev.B2 for proof reading

Mitsubishi Microcomputers

M32C/83 group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Bus Control

Example 1: After accessing the external area, the

address bus and chip select signal both are

changed in the next cycle.

The following example shows the other chip select

signal accessing area (j) in the cycle after having

accessed external area (i). In this case, the address

bus and chip select signal both change between the

two cycles.

Note: These examples show the address bus and chip select signal for two consecutive cycles.

By combining these examples, chip select signal can be extended beyond two cycles.

Data bus

Address bus

Chip select

(CSi)

Access to

external

area (i)

Chip select

(CSj)

Access to

external

area (j)

Address

Data

Example 2: After accessing the external area, only the

chip select signal is changed in the next

cycle. (The address bus does not change.)

The following example shows the CPU accesses the

internal ROM/RAM area in the cycle after having

accessed external area. In this case, the chip select

signal changes between the two cycles but the

address bus does not.

Example 3: After accessing the external area, only the

address bus is changed in the next cycle.

(The chip select signal does not change.)

The following example shows the same chip select

signal accessing area (i) in the cycle after having

accessed external area (i). In this case, the address

bus changes between the two cycles, but the chip

select signal does not.

Data bus

Address bus

Chip select

(CSi)

Data

Address

Data bus

Address bus

Chip select

Data

Address

Access to

external

area

No access

Access to

external

area (i)

Access to

external

area (i)

Data bus

Address bus

Chip select

Data

Address

Example 4: After accessing the external area, the

address bus and chip select signal both are

not changed in the next cycle.

The following example shows CPU does not access

any area in the cycle after having accessed external

area (no instruction pre-fetch is occurred). In this

case, the address bus and the chip select signal do

not change between the two cycles.

Data

Access to

external

area

Access to

internal

ROM/RAM

area

The chip select signal turns Low (active) in synchronize with the address bus. However, its turning High

depends on the area accessed in the next cycle. Figure 1.7.2 shows the output examples of the address

bus and chip select signals.

Figure 1.7.2. Example of address bus and chip select signal outputs (Separate bus)

M83 Datasheet(PDF) 56 Page - Mitsubishi Electric Semiconductor

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