4.5V to 28V Input, Synchronous PWM Buck Controllers

for DDR Termination and Point-of-Load Applications

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7

ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

CONDITIONS

MIN

MAX

UNITS

DRIVER

DH Gate-Driver On-Resistance

2.5

Ω

DL Gate-Driver On-Resistance

(Source)

DL high state

3.0

Ω

DL Gate-Driver On-Resistance

(Sink)

DL low state

1.25

Ω

FSEL LOGIC

Logic Input Current

-3

+3

µA

Logic Low (GND)

0.5

V

Logic REF Level

FSEL = REF

1.65

2.35

V

Logic Float Level

FSEL unconnected

3.15

3.85

V

Logic VL Level

FSEL = VL

V

EN/HSD OR EN LOGIC

EN/HSD or EN Shutdown Current

0.5

3.0

µA

Logic High

1.5

V

Logic Low

0.8

V

POWER-OK OUTPUT

Upper VTT, and VTTR Threshold

MAX8553

55

57

Lower VTT, and VTTR Threshold

MAX8553

43

45

Upper Threshold

MAX8554

0.646

0.698

V

Lower Threshold

MAX8554

0.504

0.552

V

POK Output Low Level

0.4

V

POK Output High Leakage

5

µA

Note 1: Consult factory for applications that require higher than 3.5V output.

Note 2: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX forced to 0V, BST

forced to 5V, and a 250pF capacitor connected from DH to LX. Actual in-circuit times may differ due to MOSFET switching

speeds.

Note 3: Specifications to -40

°C are guaranteed by design and are not production tested.