AT43USB370 datasheet(35/50 Pages) ATMEL

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AT43USB370

3340B–USB–12/03

Direct FIFO

Interface

The system processor can directly read from or write to the AT43USB370's on-chip FIFO

through the Direct FIFO interface. The Direct FIFO interface for the AT43USB370 can be con-

figured by the system processor by writing 0xFF on the address bus. The data can be pushed

into the FIFO or read from it by the system processor using any normal memory read/write

operations.

Direct FIFO Read

Figure 10 shows the timing of a FIFO read operation performed by the system processor using

the Direct FIFO Interface.

The system processor starts the Direct FIFO Read operation by placing the 0xFF

address on the address bus.

The system processor asserts the CS_N signal.

The AT43USB370 asserts the WAIT_N signal.

The system processor asserts the OE_N signal.

The AT43USB370 reads the Direct FIFO address (0xFF) from the address bus and

puts a word (32 bytes) from the FIFO on the data bus.

The AT43USB370 de-asserts the WAIT_N signal.

The system processor reads the data present on the data bus.

The system processor de-asserts the OE_N signal.

The system processor de-asserts the CS_N signal. This completes a single Direct

FIFO Read operation.

Note:

The following sequences may be used interchangeably depending of the system processor

used:

- Sequence 3 and 4

The system processor can perform further Direct FIFO Read operations by repeating

sequences 1-9. Each Direct FIFO Read operation will fetch a single word from the

AT43USB370's FIFO and place it on the data bus. This applies to a 32-bit data bus.

Figure 10. Direct FIFO Read Operation

CS_N

WAIT_N

ADDR

OE_N

DATA

tCSN

DATA

ADDR 0xFF

DATA

tCSS

tWCA

tDFWR

tDHR

tDFOD

AT43USB370 Datasheet(PDF) 35 Page - ATMEL Corporation

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