AT43USB370 datasheet(7/50 Pages) ATMEL

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AT43USB370

3340B–USB–12/03

Serial Interface

Engine (SIE)

The SIE is implemented entirely in hardware. It performs the following functions:

•

Clock and Data Recovery from incoming USB data stream

•

Serial/parallel conversion

•

NRZI encoding/decoding

•

CRC calculation (generation and checking)

•

Generating full-speed and low-speed USB physical layer signaling

•

Device connection/disconnection detection

•

Token generation (IN, OUT, SOF, SETUP etc.)

•

Keep Alive signal for low-speed devices

•

Bit stuffing and unstuffing

SIE Controller

This block serves as the interfaces between the SIE and the USBC. It decodes the commands

received from the USBC and updates the status after the end of a USB transaction. This block

also controls the FIFOs for data and control packets and provides the USB Controller access

to these FIFOs for internal data management such as automatic retries for failed transactions.

USB Controller

This internal microcontroller is dedicated to managing the USB Protocol in both the host mode

and the function mode. The Control and Status registers of the AT43USB370 are mapped into

its data memory for fast and easy access. The firmware running on this controller determines

its operating mode, either host or function.

System Interface

Controller

This internal microcontroller serves as an interface between the USB Controller and the exter-

nal system processor. Firmware running on this controller manages the data flow to and from

the system processor. It also provides a generic USB device driver interface to system

applications.

FIFO

The FIFO block contains one data FIFO block and one control FIFO block. The control FIFO

has a 128 bytes of memory which is divided into one TX and one RX control FIFO.

AT43USB370 uses this FIFO for the bi-directional control endpoint.

The data FIFO has 2 Kbytes of memory. The FIFO control logic allows for dynamic configura-

tion of the data FIFO. In host mode, the FIFO memory is divided into 1 Kbytes of TX transfer

and 1 Kbytes of RX transfer. The HUSBCD uses this memory for storing data packets. In the

event of an error during a USB transaction, the SIE controller is informed of the error and the

transaction is retried.

In function mode, the FIFO is divided into two 1 Kbytes blocks, one for the IN endpoints and

one for the OUT endpoints. Each of the 1 Kbytes endpoint block can then be dynamically con-

figured during runtime to support up to 3 endpoint in the same direction, but of varying

maximum packet sizes.

Control and Status

Registers

This block is used to configure the AT43USB370 at the start of operation. The USBC and the

SIC share this register set with the system processor interface logic.

By default this block is pre-configured for Host operation with the DMA enabled for the 32-bit

data bus. In function mode, this block is used to define the number and nature of the endpoints

for the function. A maximum of 3 IN and 3 OUT endpoints can be specified aside from the bi-

directional control endpoint. Endpoint type and, maximum packet size and other parameters

are also defined using this block.

AT43USB370 Datasheet(PDF) 7 Page - ATMEL Corporation

AT43USB370 Datasheet(HTML) 7 Page - ATMEL Corporation

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