ML9042 datasheet(30/58 Pages) LAPIS

30 / 58 page

FEDL9042-01

LAPIS Semiconductor

ML9042-xx

30/58

Instruction Codes

Table of Instruction Codes

Code

Instruction

RS1

RS0/

CSB

RW/

DB7 DB6 DB5 DB4 DB3 DB2 DB1

DB0

(SO)

Function

Execution

Time

f = 270 kHz

Display Clear

Clears all the displayed digits of the

LCD and sets the DDRAM address 00

in the address counter. The arbitrator

data is cleared.

1.52 ms

Cursor Home

Sets the DDRAM address 00 in the

address counter and shifts the display

back to the original. The content of the

DDRAM remains unchanged.

1.52 ms

Entry Mode

Setting

I/D

Determines the direction of movement

of the cursor and whether or not to shift

the display. This instruction is

executed when data is written or read.

s

Display

ON/OFF Control

Sets LCD display ON/OFF (D), cursor

ON/OFF (C) or cursor-position

character blinking ON/OFF (B).

s

Cursor/Display

Shift

S/C R/L

Moves the cursor or shifts the display

without changing the content of the

DDRAM.

s

Function Setting

ABE SSR CSR

Sets the interface data length (DL), the

number of display lines (N), the

arbitrator display (ABE), the segment

data shift direction (SSR), or the

common data shift direction (CSR).

s

CGRAM

Address Setting

ACG

Sets on CGRAM address. After that,

CGRAM data is transferred to and from

the CPU.

s

DDRAM

Address Setting

ADD

Sets a DDRAM address. After that,

DDRAM data is transferred to and from

the CPU.

s

Busy Flag/

Address Read

ADC

Reads the Busy Flag (indicating that

the ML9042 is operating) and the

content of the address counter.

s

RAM Data Write

WRITE DATA

Writes data in DDRAM, ABRAM or

CGRAM.

s

RAM Data Read

READ DATA

Reads data from DDRAM, ABRAM or

CGRAM.

s

Arbitrator

Display Line Set

AS Sets the arbitrator display line.

s

ABRAM

Address Setting

AAB

Sets an ABRAM address. After that,

ABRAM data is transferred to and from

the CPU.

s

ML9042 Datasheet(PDF) 30 Page - LAPIS Semiconductor Co., Ltd.

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