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SC2200 Datasheet(PDF) 274 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # SC2200
Description  Thin Client On a Chip
PDF  433 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

SC2200 Datasheet(HTML) 274 Page - National Semiconductor (TI)

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274
Revision 3.0
Core Logic Module (Continued)
5
Low MPU I/O Trap. If this bit is enabled and an access occurs at I/O Port 300h-301h, an SMI is generated.
0: Disable.
1: Enable.
Top level SMI status is reported at F1BAR0+I/O Offset 00h/02h[1].
Second level SMI status is reported at F3BAR0+Memory Offset 10h/12h[0].
Third level SMI status is reported at F3BAR0+Memory Offset 14h[11].
4
Fast Path Read Enable/SMI Disable. When asserted, read Fast Path (an SMI is not generated on reads from specified
addresses).
0: Disable.
1: Enable.
In Fast Path Read the Core Logic module responds to reads of addresses: 388h-38Bh; 2x0h, 2x1, 2x2h, 2x3, 2x8 and 2x9h.
If neither sound card nor FM I/O mapping is enabled, then status read trapping is not possible.
3
FM I/O Trap. If this bit is enabled and an access occurs at I/O Port 388h-38Bh, an SMI is generated.
0: Disable.
1: Enable.
Top level SMI status is reported at F1BAR0+I/O Offset 00h/02h[1].
Second level SMI status is reported at F3BAR0+Memory Offset 10h/12h[0].
2
Sound Card I/O Trap. If this bit is enabled and an access occurs in the address ranges selected by bits [1:0], an SMI is gen-
erated.
0: Disable.
1: Enable.
Top level SMI status is reported at F1BAR0+I/O Offset 00h/02h[1].
Second level SMI status is reported at F3BAR0+Memory Offset 10h/12h[0].
Third level SMI status is reported at F3BAR0+Memory Offset 14h[10].
1:0
Sound Card Address Range Select. These bits select the address range for the sound card I/O trap.
00: I/O Port 220h-22Fh
10: I/O Port 260h-26Fh
01: I/O Port 240h-24Fh
11: I/O Port 280h-28Fh
Offset 1Ah-1Bh
Internal IRQ Enable Register (R/W)
Reset Value: 0000h
15
IRQ15 Internal. Configures IRQ15 for internal (software) or external (hardware) use.
0: External.
1: Internal.
14
IRQ14 Internal. Configures IRQ14 for internal (software) or external (hardware) use.
0: External.
1: Internal.
13
Reserved. Must be set to 0.
12
IRQ12 Internal. Configures IRQ12 for internal (software) or external (hardware) use.
0: External.
1: Internal.
11
IRQ11 Internal. Configures IRQ11 for internal (software) or external (hardware) use.
0: External.
1: Internal.
10
IRQ10 Internal. Configures IRQ10 for internal (software) or external (hardware) use.
0: External.
1: Internal.
9
IRQ9 Internal. Configures IRQ9 for internal (software) or external (hardware) use.
0: External.
1: Internal.
8
Reserved. Must be set to 0.
7
IRQ7 Internal. Configures IRQ7 for internal (software) or external (hardware) use.
0: External.
1: Internal.
Table 5-38. F3BAR0+Memory Offset: XpressAUDIO Configuration Registers (Continued)
Bit
Description



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