SC2200 datasheet(275/433 Pages) NSC

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Core Logic Module (Continued)

Reserved. Must be set to 0.

IRQ5 Internal. Configures IRQ5 for internal (software) or external (hardware) use.

0: External.

1: Internal.

IRQ4 Internal. Configures IRQ4 for internal (software) or external (hardware) use.

0: External.

1: Internal.

IRQ3 Internal. Configures IRQ3 for internal (software) or external (hardware) use.

0: External.

1: Internal.

2:0

Reserved. Must be set to 0.

Offset 1Ch-1Fh

Internal IRQ Control Register (R/W)

Reset Value: 00000000h

Note:

Bits 31:16 of this register are Write Only. Reads to these bits always return a value of 0.

Mask Internal IRQ15. (Write Only)

0: Disable.

1: Enable.

Mask Internal IRQ14. (Write Only)

0: Disable.

1: Enable.

Reserved. (Write Only) Must be set to 0.

Mask Internal IRQ12. (Write Only)

0: Disable.

1: Enable.

Mask Internal IRQ11. (Write Only)

0: Disable.

1: Enable.

Mask Internal IRQ10. (Write Only)

0: Disable.

1: Enable.

Mask Internal IRQ9. (Write Only)

0: Disable.

1: Enable.

Reserved. (Write Only) Must be set to 0.

Mask Internal IRQ7. (Write Only)

0: Disable.

1: Enable.

Reserved. (Write Only) Must be set to 0.

Mask Internal IRQ5. (Write Only)

0: Disable.

1: Enable.

Mask Internal IRQ4. (Write Only)

0: Disable.

1: Enable.

Mask Internal IRQ3. (Write Only)

0: Disable.

1: Enable.

18:16

Reserved. (Write Only) Must be set to 0.

Table 5-38. F3BAR0+Memory Offset: XpressAUDIO Configuration Registers (Continued)

Bit

Description

SC2200 Datasheet(PDF) 275 Page - National Semiconductor (TI)

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