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PC87363 Datasheet(PDF) 28 Page - National Semiconductor (TI) |
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PC87363 Datasheet(HTML) 28 Page - National Semiconductor (TI) |
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28 / 200 page  1.0 Signal/Pin Connection and Description (Continued) 28 www.national.com 1.4.17 WATCHDOG Timer (WDT) PSON 34 O O4,OD12 VSB Power Supply On. Active level (low or high via PSONPOL strap) instructs the main power supply to turn the power on. PSON output signal is open-drain when active low and push-pull when active high PWBTIN 35 I INTS VSB Power Button In. Active (low) level indicates a user request to turn the power on or off. This pin has an internal Schmidt-trigger input buffer and debouce protection of at least 16 mS. PWBTOUT 33 O OD12 VSB Power Button Out. Active (low) level serves as output to the chipset power button input. PWUREQ 32 O OD6 VSB Power-Up Request. Active (low) level indicates that wake-up event has occurred, and causes the chipset to turn the power supply on, or to exit its current sleep state. The open-drain output must be pulled up to VSB in order to function during power-off. RING 27 I INTS VSB Telephone Line Ring. Detection of a pulse train on the RING pin is a wake-up event that can activate the power-up request (PWUREQ). The pin has a Schmidt-trigger input buffer, powered by VSB. SLPS3 36 I INTS VSB Sleep State 3, 4 or 5. Input from this pin is assumed to be driven by the system’s ACPI controller to indicate the system’s power state. SLPS5 37 I INTS VSB Sleep State 4 or 5. Input from this pin is assumed to be driven by the system’s ACPI controller to indicate the system’s power state. Signal Pin/s I/O Buffer Type Power Well Description WDO 56 O OD6,O3/6 VDD WATCHDOG Out. Low level indicates that the WATCHDOG Timer has reached its time-out period without being retriggered. The output type and an optional pull-up are configurable. Signal Pin/s I/O Buffer Type Power Well Description |
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