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PC87570 Datasheet(PDF) 80 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87570
Description  PC87570 Keyboard and Power Management Controller
PDF  168 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87570 Datasheet(HTML) 80 Page - National Semiconductor (TI)

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Power Mode Control (PMC)
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www.national.com
8.4
POWER MODE CONTROL REGISTER (PMCR)
The PMCR Register is a byte-wide, read/write register that
enables you to switch from Active to Idle mode. In addition,
it controls the operation of the HFCG in Idle mode by en-
abling or disabling it. The PC87570 enters Idle mode after
execution of a WAIT instruction. The PMCR Register must
be set before executing the WAIT instruction.
Upon reset, the non-reserved bits of PMCR are cleared.
Bit 1 - Disable High Frequency Clock Generator (DHF)
0: HFCG remains enabled after entering Idle mode;
waking up to Active mode clears this bit
1: HFCG disabled only after WAIT instruction is exe-
cuted and Idle mode is entered
Bit 2 - IDLE
0: PC87570 remains in Active mode after WAIT in-
struction is executed
1: PC87570 can enter Idle mode, depending on set-
ting of EIM bit; waking up to Active mode clears
this bit
Bit 5 - Enable Idle Mode (EIM)
0: Idle mode not enabled
1: Active to Idle mode switch enabled, performed by
setting IDLE bit and executing a WAIT instruction.
8.5
USAGE HINTS
The hints below apply when you enter Idle mode and dis-
able the HFCG.
1. When disabling HFCG in Idle mode, a frequency clock
may be generated that differs from the selected setting,
due to temperature variations in your working environ-
ment. For details, refer to “tCLKINTwk” on page 138. To
avoid any failures that may result from waking up to a
higher frequency than zone 0 of the External Memory
can handle, follow the procedures exactly.
Before entering Idle mode, configure SZCFG0 for an ad-
ditional Wait clock cycle (see the BIU, Section 3.5.3 on
page 45, for details on SZCFG0 configuration).
2. After waking up from Idle mode, wait 0.5 seconds before
returning to your previous SZCFG0 configuration.
Active
Idle
Power Off
Turn Off Power
PMCR.EIM=1
Turn On Power
Hardware Event
Reset
Figure 8-1. Power Modes and Transitions
PMCR.IDLE=1
and WAIT
7
6
5
4
3
2
1
0
Reserved
EIM
Reserved IDLE
DHF
Res



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