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PALCE29MA16 Datasheet(PDF) 20 Page - Advanced Micro Devices

Part # PALCE29MA16
Description  24-Pin EE CMOS Programmable Array Logic
PDF  25 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

PALCE29MA16 Datasheet(HTML) 20 Page - Advanced Micro Devices

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AMD
2-368
PALCE29MA16H-25 (Com’l)
SWITCHING CHARACTERISTICS
Reset/Preset, Enable
Note:
1. Output disable times do not include test load RC time constants.
Parameter
Symbol
Parameter Description
Min
Max
Unit
tAPO
Input or I/O Pin to Output Register/Latch
30
ns
Reset/Preset
tAW
Asynchronous Reset/Preset Pulse Width
15
ns
tARO
Asynchronous Reset/Preset to Output
15
ns
Register/Latch Recovery
tARI
Asynchronous Reset/Preset to Input
12
ns
Register/Latch Recovery
tARPO
Asynchronous Reset/Preset to Output
4
ns
Register/Latch Recovery PT Clock/LE
tARPI
Asynchronous Reset/Preset to Input
6
ns
Register/Latch Recovery PT Clock/LE
Output Enable Operation
tPZX
I/
OE Pin to Output Enable
20
ns
tPXZ
I/
OE Pin to Output Disable (Note 1)
20
ns
tEA
Input or I/O to Output Enable via PT
25
ns
tER
Input or I/O to Output Disable via PT (Note 1)
25
ns
SWITCHING WAVEFORMS
Input Register/Latch Reset/Preset
Combinatorial
Asynchronous
Reset/Preset
VT
VT
Clock
tAW
tARI
VT
Pin 11
Combinatorial/
Registered/
Latched
Output
Pin 11 to Output Disable/Enable
t PXZ
t PZX
VOL + 0.5 V
VOH - 0.5 V
VT
Output Register/Latch Reset/Preset
Combinatorial
Asynchronous
Reset/Preset
Registered/
Latched
Output
VT
VT
VT
Clock
tARO
tAW
t APO
08811G-37
08811G-39
08811G-38
Combinatorial/
Registered/
Latched
Output
Input to Output Disable/Enable
t ER
t EA
VOL + 0.5 V
VOH - 0.5 V
VT
VT
Combinatorial
Input
08811G-40



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