IC-MB4 datasheet(18/40 Pages) ICHAUS

18 / 40 page

prel

imin

ary

prel

imin

ary

iC-MB4

BiSS INTERFACE MASTER

Rev B2, Page 18/40

OVERVIEW

Addr

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Sensor and Actuator Data

0x00

SCDATA1(7:0)

0x01 . .

0x07

SCDATA1(63:8)

0x08 . .

0x3F

SCDATA2(63:0) . . SCDATA8(63:0)

0x40 . .

0x7F

– ∗

0x80 †

RDATA1(7:0)

0x80 ‡

IDS(7:0)

0x81 . .

0xBF

RDATA2(7:0) . . RDATA64(7:0)

Configuration Slave 1

0xC0

GRAYS1 /

LSTOP1

ENSCD1

SCDLEN1(5:0)

0xC1

SELCRCS1

SCRCLEN1(6:0) / SCRCPOLY1(7:1)

0xC2

SCRCSTART1(7:0)

0xC3

SCRCSTART1(15:8)

0xC4 . .

0xDF

Configuration Slave 2(31:0) . . Configuration Slave 8(31:0)

Control Communication Configuration

0xE0

– ∗

0xE1

– ∗

0xE2

WNR

REGADR(6:0)

0xE3

– ∗

REGNUM(5:0)

0xE4

– ∗

CHSEL(2:1)

0xE5 †

CTS

REGVERS

SLAVEID(2:0)

– ∗

EN_MO

HOLDCDM

0xE5 ‡

CTS

REGVERS

CMD(1:0)

IDA_TEST

– ∗

EN_MO

HOLDCDM

Master Configuration

0xE6

FREQR(2:0)

FREQS(4:0)

0xE7

– ∗

NOCRC

SINGLEBANK

0xE8

FREQAGS(7:0)

0xE9

MO_BUSY(7:0)

0xEA

REVISION(7:0)§

0xEB

VERSION(7:0)§

Channel Configuration

0xEC

’0’

SLAVELOC5

’0’

’1’

0xED

– ∗

CFGCH2(1:0)

CFGCH1(1:0)

0xEE

– ∗

∗ Reserved or unused register bits highlighted as ”–” need to be written with 0 if a byte wide register write access is required.

† Using register access in control communication.

‡ Using command/instructions in control communication.

§ Register bits with constant ”0” or ”1” are ROM-based values and can not be changed through writing.

IC-MB4 Datasheet(PDF) 18 Page - IC-Haus GmbH

IC-MB4 Datasheet(HTML) 18 Page - IC-Haus GmbH

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL