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IC-MN Datasheet(PDF) 21 Page - IC-Haus GmbH

Part # IC-MN
Description  25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
PDF  62 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-MN Datasheet(HTML) 21 Page - IC-Haus GmbH

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iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev F2, Page 21/62
OPERATING MODES and CALIBRATION PROCEDURES
iC-MN supports a number of different calibration strate-
gies, providing both digital and analog test signals to
this end. The following tables give the various modes
of operation.
For the adjustment of the signal conditioning unit ana-
log test signals are output in analog calibration modes
ANA_x, with digital signals activated by digital calibra-
tion modes DIG_x, enabling the signal conditioning
to be set across measurements of various duty cycles.
The order of the procedure for both modes of calibration
is described in the following chapter.
Alternatively, with an active signal level controller iC-MN
can be calibrated in controller modes AAC_x, where
the residual signal ripple is minimized. For this purpose
the signal gain, offset and phase correction parameters
must be set in such a way that the controller signal
CGUCKx available at pin T0 are devoid of AC contents.
In calibration modes TWIB and TEIB the tempera-
ture monitoring and bias reference source IBP can be
adjusted. Here the temperature threshold is set to the
required value for either warning or shutdown; the other
value is determined by the fixed difference of the switch-
ing thresholds.
As the VTTx measurement voltages and CGUCKx sig-
nals are only available via a buffer stage the buffer
offset voltage must be taken into account if the temper-
ature thresholds are to be adjusted with any accuracy.
To this end the buffer offset voltage can be measured in
calibration mode TBOS. A voltage is then applied to
pin T1, with the buffer offset voltage being the difference
between this and pin T0.
Parameter
Output Signals
Op. Mode TRACMODE CALMODE BYP* Pins PSOUT, NSOUT, PCOUT, NCOUT Pin T0 Pin T1 Pin DIR
Normal
0
0
0
Output of master track via line driver
0
0
-
Table 8: Normal operating mode
Parameter
Output Signals
Op. Mode TRACMODE CALMODE BYP* Pins PSOUT, NSOUT, PCOUT, NCOUT Pin T0
Pin T1
Pin DIR
Signal calibration modes with VDCx intermediate voltages
ANA_M
1
0
0
Calib. signals of master chan.
SVDCM
CVDCM -
1
0
1
PSINM, NSINM, PCINM, NCINM
SVDCM
CVDCM -
ANA_S
2
0
0
Calib. signals of segment chan.
SVDCS
CVDCS -
2
0
1
PSINS, NSINS, PCINS, NCINS
SVDCS
CVDCS -
ANA_N
3
0
0
Calib. signals of nonius chan.
SVDCN
CVDCN -
3
0
1
PSINN, NSINN, PCINN, NCINN
SVDCN
CVDCN -
Signal calibration modes with AC noise evaluation (with active sine-square level controlling)
AAC_M
1
4
Calib. signals of master chan.
CGUCKM
-
AAC_S
2
4
Calib. signals of segment chan.
CGUCKS
-
-
AAC_N
3
4
Calib. signals of nonius chan.
CGUCKN
-
-
Bias calibration, temperature-sensor calibration, and buffer offset measurement
TWIB
0
5
Output of master track via line driver
VTSw
VTth
IBP
TEIB
0
6
Output of master track via line driver
VTSe
VTtherr
IBP
TBOS
0
7
Output of master track via line driver
BUFFOUT BUFFIN -
Notes
S/D conversion modes with a cyclic conversion, such as 0x08, 0x09, 0x0A, are not permitted during
signal calibration. Cyclic BiSS data requests must also be avoided due to its trigger for sample-and-hold.
Analog calibration signals are output via 4 kΩ source impedance. The maximum permissible signal
frequency is 2 kHz for a load of 200 pF (see Elec. Char. 711, 712)
* Bypass function: inputs (without voltage divider) to outputs, ca. 7 kΩ source impedance
Table 9: Operating modes for analog signal calibration



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