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IC-MN Datasheet(PDF) 35 Page - IC-Haus GmbH

Part # IC-MN
Description  25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
PDF  62 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-MN Datasheet(HTML) 35 Page - IC-Haus GmbH

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iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev F2, Page 35/62
TRACK OFFSET CALIBRATION
Depending on the track resolution the offset values of
the nonius and segment tracks (POV = Phase-Offset-
Value) must be justified to the left in the SPO_N and
SPO_S registers. These offsets are added to the con-
version result of each track prior to synchronization and
are instrumental in calibrating the track.
MSB
POV_x
SPO_x
register:
S: ADR 0x38, bit 0
N: ADR 0x39, bit 5
S: ADR 0x39, bit 4
N: ADR 0x3B, bit 1
datalength defined by UBL_x+SBL_x
0
LSB
POV_x
0
0
Figure 14: SPO_x (x=S,N)
SPO_N
Addr. 0x3B; bit 1:0
Addr. 0x3A; bit 7:0
Addr. 0x39; bit 7:5
SPO_S
Addr. 0x39; bit 4:0
Addr. 0x38; bit 7:0
0x0000
. . .
Track Offset
0x1FFF
Table 49: Track offsets for nonius and segment
Note:
For nonius synchronization (see MODE_ST) it is im-
portant that the used tracks within the 2UBL_S+UBL_N
master track periods have a shared zero crossing
once. With SPO_S or SPO_N the segment and non-
ius tracks can be shifted to the master track accord-
ingly.



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