AD9608 datasheet(17/41 Pages) AD

17 / 41 page

AD9608

Data Sheet

Rev. C | Page 16 of 40

Pin No.

Mnemonic

Type

Description

Digital Outputs

B D1+/D0+ (LSB)

Output

Channel B LVDS Output Data 1/ Data 0—True.

B D1−/D0− (LSB)

Output

Channel B LVDS Output Data 1/ Data 0—Complement.

B D3+/D2+

Output

Channel B LVDS Output Data 3/ Data 2—True.

B D3−/D2−

Output

Channel B LVDS Output Data 3/ Data 2—Complement.

B D5+/D4+

Output

Channel B LVDS Output Data 5/ Data 4—True.

B D5−/D4−

Output

Channel B LVDS Output Data 5/ Data 4—Complement.

B D7+/D6+

Output

Channel B LVDS Output Data 7/ Data 6—True.

B D7−/D6−

Output

Channel B LVDS Output Data 7/ Data 6—Complement.

B D9+/D8+ (MSB)

Output

Channel B LVDS Output Data 9/ Data 8—True.

B D9−/D8− (MSB)

Output

Channel B LVDS Output Data 9/ Data 8—Complement.

A D1+/D0+ (LSB)

Output

Channel A LVDS Output Data 1/ Data 0—True.

A D1−/D0− (LSB)

Output

Channel A LVDS Output Data 1/ Data 0—Complement.

A D3+/D2+

Output

Channel A LVDS Output Data 3/ Data 2—True.

A D3−/D2−

Output

Channel A LVDS Output Data 3/ Data 2—Complement.

A D5+/D4+

Output

Channel A LVDS Output Data 5/ Data 4—True.

A D5−/D4−

Output

Channel A LVDS Output Data 5/ Data 4—Complement.

A D7+/D6+

Output

Channel A LVDS Output Data 7/ Data 6—True.

A D7−/D6−

Output

Channel A LVDS Output Data 7/ Data 6—Complement.

A D9+/D8+ (MSB)

Output

Channel A LVDS Output Data 9/ Data 8—True.

A D9−/D8− (MSB)

Output

Channel A LVDS Output Data 9/ Data 8—Complement.

OR+

Output

Channel A/Channel B LVDS Overrange Output—True.

OR−

Output

Channel A/Channel B LVDS Overrange Output—Complement.

DCO+

Output

Channel A/Channel B LVDS Data Clock Output—True.

DCO−

Output

Channel A/Channel B LVDS Data Clock Output—Complement.

SPI Control

SCLK/DFS

Input

SPI Serial Clock/Data Format Select Pin in External Pin Mode.

SDIO/DCS

Input/Output

SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.

CSB

Input

SPI Chip Select (Active Low).

ADC Configuration

OEB

Input

Output Enable Input (Active Low).

PDWN

Input

Power-Down Input in External Pin Mode. In SPI mode, this input can be

configured as power-down or standby.

AD9608 Datasheet(PDF) 17 Page - Analog Devices

AD9608 Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

Datasheet Download

Link URL