AD9430 datasheet(30/45 Pages) AD

30 / 45 page

AD9430

Rev. E | Page 29 of 44

CMOS DATA OUTPUTS

The ADC CMOS digital outputs are latched on the board by

four LVT574s; the latch outputs are available at the two 40-pin

connectors at Pin 11 through Pin 33 on P23 (Channel A) and

Pin 11 through Pin 33 on P3 (Channel B). The latch output

clocks (data ready) are available at Pin 37 on P23 (Channel A)

and Pin 37 on P3 (Channel B). The data-ready clocks can be

inverted at the timing controls section if needed.

CH1

CH2

M 5.00ns

∆: 4.6ns

C1 FREQ

84.65608MHz

2.00V

Figure 55. Data Output and Clock @ 80-Pin Connector

CRYSTAL OSCILLATOR

An optional crystal oscillator can be placed on the board to

serve as a clock source for the PCB. Power to the oscillator is

through the VCLK pin at the power connector (also called

VCLK/V_XTAL). If an oscillator is used, ensure proper

termination for best results. The board has been tested with a

Valpey Fisher VF561 and a Vectron JN00158-163.84. Test

results for the VF561 are shown in Figure 56.

MHz

–30

080

–60

–80

–20

–10

–50

–40

–100

–90

–70

ENCODE 163.84MHz

ANALOG 65.02MHz

SNR 63.93dB

SINAD 63.87dB

FUND –0.45dBFS

2ND –85.62dBc

3RD –91.31dBc

4TH –90.54dBc

5TH –90.56dBc

6TH –91.12dBc

THD –82.21dBc

SFDR 83.93dBc

SAMPLES 8k

NOISEFLR –100.44dBFS

WORSTSP –83.93dBc

Figure 56. FFT—Using VF561 Crystal as Clock Source

OPTIONAL AMPLIFIER

The evaluation board as shipped uses a wideband RF

transformer in its analog path. A user can modify the board to

use the AD8351 op amp for ac- or dc-coupled applications

(see Figure 59 and Figure 60). Figure 60 shows the AD8351 in

an ac-coupled topology, while Figure 57 shows the AD8351 in

a dc-coupled application. Optimum performance is obtained

with the AD8351 ac coupled.

SINGLE-

ENDED



SOURCE

100nF

AD8351

INHI

INLO

OPHI

OPLO

VOCM

DIGITAL

OUT

AD9430

AIN+

AIN–

100nF

5pF

2.8V



Figure 57. Using the AD8351 on the AD9430 PCB

AD9430 Datasheet(PDF) 30 Page - Analog Devices

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