AD7889 datasheet(33/40 Pages) AD

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Data Sheet

AD7879/AD7889

Rev. D | Page 33 of 40

SERIAL INTERFACE

The AD7879 and AD7879-1 (AD7889 and AD7889-1) differ

only in the serial interface provided on the device. The AD7879

and the AD7889 are available with a serial peripheral interface

(SPI). The AD7879-1 and the AD7889-1 are available with an

I2C-compatible interface. It is recommended that addresses

outside the register map not be written to.

SPI INTERFACE

The AD7879/AD7889 have a 4-wire SPI. The SPI has a data

input pin (DIN) for inputting data to the device, a data output pin

(DOUT) for reading data back from the device, and a data clock

pin (SCL) for clocking data into and out of the device. A chip

select pin (CS) enables or disables the serial interface. CS is

required for correct operation of the SPI interface. Data is

clocked out of the AD7879/AD7889 on the falling edge of SCL,

and data is clocked into the device on the rising edge of SCL.

SPI Command Word

All data transactions on the SPI bus begin with the master taking

CS from high to low and sending out the command word. This

indicates to the AD7879/AD7889 whether the transaction is a

read or a write and gives the address of the register from which

to begin the data transfer. The bit map in Table 24 shows the

SPI command word.

Table 24. SPI Command Word

MSB

LSB

[9:0]

R/W

Bits[15:11] of the command word must be set to 11100 to

successfully begin a bus transaction.

Bit 10 is the read/write bit; 1 indicates a read, and 0 indicates

a write.

Bits[9:0] contain the target register address. When reading or

writing to more than one register, this address indicates the

address of the first register to be written to or read from.

Writing Data

Data is written to the AD7879/AD7889 in 16-bit words. The

first word written to the device is the command word, with the

read/write bit set to 0. The master then supplies the 16-bit input

data-word on the DIN line. The AD7879/AD7889 clock the data

into the register addressed in the command word. If there is more

than one word of data to be clocked in, the AD7879/AD7889

automatically increment the address pointer and clocks the next

data-word into the following register.

The AD7879/AD7889 continue to clock in data on the DIN line

until the master ends the write transition by pulling CS high or

until the address pointer reaches its maximum value. The AD7879/

AD7889 address pointer does not wrap. When the address

pointer reaches its maximum value, any data provided by the

master on the DIN line is ignored by the AD7879/AD7889.

NOTES

1. DATA BITS ARE LATCHED ON SCL RISING EDGES. SCL CAN IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.

2. ALL 32 BITS MUST BE WRITTEN: 16 BITS FOR THE COMMAND WORD AND 16 BITS FOR DATA.

3. 16-BIT COMMAND WORD SETTINGS FOR SINGLE WRITE OPERATION:

CW[15:11] = 11100 (ENABLE WORD)

CW[10] = 0 (R/W)

CW[9:0] = [AD9, AD8, AD7, AD6, AD5, AD4, AD3, AD2, AD1, AD0] (10-BIT MSB JUSTIFIED REGISTER ADDRESS)

DIN

16-BIT COMMAND WORD

16-BIT DATA

6789

SCL

1234

D15

D14

D13

ENABLE WORD

R/W

Figure 39. Single Register Write, SPI Timing

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