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AD9863 Datasheet(PDF) 9 Page - Analog Devices

Part # AD9863
Description  Transceiver for Broadband Applications
PDF  41 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9863 Datasheet(HTML) 9 Page - Analog Devices

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AD9863
Data Sheet
Rev. B | Page 8 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SPI_DIO
SPI_CLK
SPI_SDO
ADC_LO_PWR
NOTES
1. EXPOSED PAD. THE EXPOSED PAD MUST BE SECURELY CONNECTED
TO THE GROUND PLANE.
DVDD
DVSS
AVDD
IOUT–A
IOUT+A
AGND
REFIO
FSADJ
AGND
IOUT+B
IOUT–B
AVDD
CLKIN1
CLKIN2
RESET
L0
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
IFACE1
AD9863
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Figure 3. Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
Name1
Description2,3
1
SPI_DIO
(Interp1)
SPI: Serial Port Data Input.
No SPI: Tx Interpolation Pin, MSB.
2
SPI_CLK
(Interp0)
SPI: Serial Port Shift Clock.
No SPI: Tx Interpolation Pin, LSB.
3
SPI_SDO
(FD/HD)
SPI: 4-Wire Serial Port Data Output.
No SPI: Configures Full-Duplex or Half-Duplex Mode.
4
ADC_LO_PWR
ADC Low Power Mode Enable. Defined at power-up.
5, 31
DVDD, DRVDD
Digital Supply.
6, 32
DVSS, DRVDD
Digital Ground.
7, 16, 50, 51, 61
AVDD
Analog Supply.
8, 9
IOUT
−A, IOUT+A
DAC A Differential Output.
10, 13, 49, 53, 59
AGND, AVSS
Analog Ground.
11
REFIO
Tx DAC Band Gap Reference Decoupling Pin.
12
FSADJ
Tx DAC Full-Scale Adjust Pin.
14, 15
IOUT+B, IOUT−B
DAC B Differential Output.
17
IFACE2
(12/24)
SPI: Buffered CLKIN. Can be configured as system clock output.
No SPI: Buffered CLKIN for FD; 12/24 configuration pin for HD24 or HD12.
18
IFACE3
Clock Output.
19 to 30
U11 to U0
Upper Data Bit 11 to Upper Data Bit 0.
33
IFACE1
SPI: TxSYNC for FD; Tx/Rx for HD24, HD12, or clone.
No SPI: FD >> TxSYNC; HD24 or HD12: Tx/Rx. Clone mode requires a serial port
interface.
34 to 45
L11 to L0
Lower Data Bit 11 to Lower Data Bit 0.
46
RESET
Chip Reset When Low.
47
CLKIN2
Clock Input 2.
48
CLKIN1
Clock Input 1.
52
REFB
ADC Bottom Reference.
54, 55
VIN+B, VIN−B
ADC B Differential Input.



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