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ADF9010

Rev. 0 | Page 5 of 28

INTEGER-N PLL AND VCO CHARACTERISTICS

Table 3.

Parameter

B Version1

Unit

Test Conditions/Comments

Min

Typ

Max

VCOOPERATING FREQUENCY

3360

3840

MHz

LO OUTPUT CHARACTERISTICS

Measured at LO output (900 MHz)

VCO Control Voltage Sensitivity

MHz/V

3.6 GHz VCO frequency (taking into account

divide by 4)

Harmonic Content (Second)

−27

dBc

Harmonic Content (Third)

−14

dBc

Frequency Pushing (Open Loop)

1.2

MHz/V

Frequency Pulling (Open Loop)

Into 2.00 VSWR load.

Lock Time

1000

μs

10 kHz loop bandwidth

Output Power

−4 to +5

dBm

LO outputs combined in a 1:1 transformer;

programmable in 3 dB steps

Output Power Variation

±3

NOISE CHARACTERISTICS

Measured at LO output (900 MHz)

VCO Phase Noise Performance2

@ 100 kHz Offset

−120

dBc/Hz

@ 1 MHz Offset

−141

dBc/Hz

@ 10 MHz Offset

−154

dBc/Hz

In-Band Phase Noise3, 4

−96

dBc/Hz

@ 1 kHz offset from carrier

Normalized In-Band Phase Noise Floor3, 4

−220

dBc/Hz

Spurious Frequencies at Output Channel Spacing

−70

dBc

900 MHz offset, 1 MHz PFD frequency, 250 kHz

channel spacing; loop bandwidth = 7.5 kHz

PHASE DETECTOR

Phase Detector Frequency5

MHz

Maximum Allowable Prescaler Output Frequency6

325

MHz

CHARGE PUMP

ICP Sink/Source

With RSET = 4.7 kΩ

High Value

Low Value

0.625

RSET Range

2.7

kΩ

ICP Three-State Leakage Current

0.2

Sink and Source Current Matching

1.25 V ≤ VCP ≤ 2.5 V

ICP vs. VCP

1.5

1.25 V ≤ VCP ≤ 2.5 V

ICP vs. Temperature

VCP = 2.0 V

PLL REFERENCE

Reference Clock Frequency

104

MHz

Reference Clock Sensitivity

0.7

PLL VDD

V p-p

Reference Input Capacitance

REFIN Input Current

±100

μA

1 Operating temperature range for the B version is −40°C to +85°C.

2 The noise of the VCO is measured in open-loop conditions.

3 The phase noise is measured with the EVAL-ADF9010EBZ1 evaluation board and the Agilent E5052A spectrum analyzer. The spectrum analyzer provides the REFIN for

the synthesizer; offset frequency = 1 kHz.

4 fREFIN = 10 MHz; fPFD = 1000 kHz; N = 3600; loop BW = 25 kHz.

5 Guaranteed by design. Sample tested to ensure compliance.

6 This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that

is less than this value.

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