ADF9010

Rev. 0 | Page 15 of 28

LATCH STRUCTURE

Figure 21 shows the three on-chip latches for the ADF9010. The two LSBs determine which latch is programmed.

G2

G3

BW2

T1

T15

T16

T7

T8

T12

T13

T14

HP

T10

T11

T6

T5

T4

T2

T3

Rx FILTER

GAIN STEPS

G1

T9

Rx FILTER

BANDWIDTH

BW1

TEST MODES

DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3 DB2

DB1

DB0

C2 (0) C1 (0)

RES RES

F1

M1

M2

F2

PD4

RES

CPI1

CPI2

PD1

PD2

PD3

M3

CONTROL

BITS

CHARGE

PUMP

CURRENT

MUXOUT

TP1

TP2

DB21

P2

P1

F5

DB22

DB23

F3

F4

CONTROL LATCH

Tx LATCH

MUTE

LO

UNTIL

LD

MUTE

Tx

UNTIL

LD

LO

OUTPUT

POWER

Tx

OUTPUT

POWER

CPI3

RESERVED

C2 (1) C2 (0)

A1

A2

A3

A4

A5

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

5-BIT A COUNTER

13-BIT B COUNTER

PRESCALER

G1

P2

P1

M1

R2

R3

R4

R5

R6

R7

R8

R9

R10

R11

R12

R13

R1

BSC1

BSC2

T1

T2

T3

CONTROL

BITS

13-BIT REFERENCE COUNTER

P2

P1

BAND

SELECT

CLOCK

P3

R13

BSC1

BSC2

T1

T2

T3

P2

P1

P3

Tx MOD

LO PHASE

SELECT

Tx MOD

LO PHASE

SELECT

LO PHASE

SELECT

BAND

SELECT

CLOCK

LO PHASE

SELECT

C3 (0) C2 (0) C1 (1)

RC2

RC3

RC4

RC5

RC6

HP2

HP1

HP3

HP4

HP5

HP6

RC1

Rx CALIBRATION DIVIDER

Rx CALIBRATION

LO LATCH

Rx LATCH

HIGH-PASS FILTER BOOST

TIMEOUT COUNTER

DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3 DB2

DB1

DB0

C3 (1)C2 (0)C1 (1)

DB2

DB1

DB0

DB21

DB22

DB23

DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB21

DB22

DB23

DB2

DB1

DB0

DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB21

DB22

DB23

DB2

DB1

DB0

DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB21

DB22

DB23

CONTROL

BITS

CONTROL

BITS

C2 (1) C1 (1)

CONTROL

BITS

Figure 21. Latch Summary