AR0141CS datasheet(3/48 Pages) ONSEMI

3 / 48 page

AR0141CS

www.onsemi.com

GENERAL DESCRIPTION

The ON Semiconductor AR0141CS can be operated in its

default mode or programmed for frame size, exposure, gain,

and other parameters. The default mode output is a

720p−resolution image at 60 frames per second (fps). In

linear mode, it outputs 12−bit raw data, using either the

parallel or serial (HiSPi) output ports. The device may be

operated in video (master) mode or in single frame trigger

mode.

FRAME_VALID and LINE_VALID signals are output on

dedicated pins, along with a synchronized pixel clock in

parallel mode.

The AR0141CS includes additional features to allow

application−specific tuning: windowing and offset, auto

black level correction, and on−board temperature sensor.

Optional register information and histogram statistic

information can be embedded in the first and last 2 lines of

the image frame.

FUNCTIONAL OVERVIEW

The AR0141CS is a progressive−scan sensor that

generates a stream of pixel data at a constant frame rate. It

uses an on−chip, phase−locked loop (PLL) that can be

optionally enabled to generate all internal clocks from a

single master input clock running between 6 and 50 MHz.

The maximum output pixel rate is 148.5 Mp/s,

corresponding to a clock rate of 74.25 MHz. Figure 1 shows

a block diagram of the sensor.

Figure 1. Block Diagram

Digital gain and

pedestal

12 bits

Parallel

HiSPi

12 or 10 bits

Row noise correction

Black level correction

Pixel defect correction

Test pattern generator

ADC data

Adaptive CD filter

User interaction with the sensor is through the two−wire

serial bus, which communicates with the array control,

analog signal chain, and digital signal chain. The core of the

sensor is a 1.1 Mp Active− Pixel Sensor array. The timing

and control circuitry sequences through the rows of the

array, resetting and then reading each row in turn. In the time

interval between resetting a row and reading that row, the

pixels in the row integrate incident light. The exposure is

controlled by varying the time interval between reset and

readout. Once a row has been read, the data from the

columns is sequenced through an analog signal chain

(providing offset correction and gain), and then through an

analog−to−digital converter (ADC). The output from the

ADC is a 12−bit value for each pixel in the array. The ADC

output passes through a digital processing signal chain

(which provides further data path corrections and applies

digital gain).

AR0141CS Datasheet(PDF) 3 Page - ON Semiconductor

AR0141CS Datasheet(HTML) 3 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL