AR0331 datasheet(38/52 Pages) ONSEMI

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AR0331

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Single READ from Random Location

This sequence (Figure 37) starts with a dummy WRITE to

the 16-bit address that is to be used for the READ. The

master terminates the WRITE by generating a restart

condition. The master then sends the 8-bit read slave

address/data direction byte and clocks out one byte of

generating a no-acknowledge bit followed by a stop

condition. Figure 37 shows how the internal register address

maintained by the AR0331 is loaded and incremented as the

sequence proceeds.

Figure 37. Single READ from Random Location

Previous Reg Address, N

Reg Address, M

M+1

Slave

Address

Reg

Address[15:8]

Reg

Address[7:0]

Slave Address

S = Start Condition

P = Stop Condition

Sr = Restart Condition

A = Acknowledge

A = No-acknowledge

Slave to Master

Master to Slave

Read Data

Single READ From Current Location

This sequence (Figure 38) performs a read using the

current value of the AR0331 internal register address. The

master terminates the READ by generating a

no-acknowledge bit followed by a stop condition. The figure

shows two independent READ sequences.

N+L

N+L−1

N+2

N+1

Previous Reg Address, N

Read Data

Slave Address

Read Data

Figure 38. Single READ from Current Location

Sequential READ, Start From Random Location

This sequence (Figure 42) starts in the same way as the

single WRITE to random location (Figure 41). Instead of

generating a no-acknowledge bit after the first byte of data

has been transferred, the master generates an acknowledge

bit and continues to perform byte WRITEs until “L” bytes

have been written. The WRITE is terminated by the master

generating a stop condition.

Figure 39. Sequential READ, Start from Random Location

Previous Reg Address, N

Reg Address, M

Slave Address

Reg Address[15:8]

M+1

Reg Address[7:0]

Read Data

Slave Address

M+L

M+L−1

M+L−2

M+1

M+2

M+3

Read Data

AR0331 Datasheet(PDF) 38 Page - ON Semiconductor

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