AR0331 datasheet(4/52 Pages) ONSEMI

4 / 52 page

AR0331

www.onsemi.com

Figure 2. Typical Configuration: Serial Four-Lane HiSPi Interface

VAA_PIX

Master clock

(6–48 MHz)

DGND

Digital

ground

Analog

ground

Notes:

1. All power supplies should be adequately decoupled.

2. ON Semiconductor recommends a resistor value of 1.5 kΩ, but a greater value may be used for slower two-wire speed.

3. The parallel interface output pads can be left unconnected if the serial output interface is used.

4. ON Semiconductor recommends that 0.1 μF and 10 μF decoupling capacitors for each power supply

are mounted as close as possible to the pad. Actual values and results may vary depending on layout and design

considerations. Refer to the AR0331 demo headboard schematics for circuit recommendations.

5. ON Semiconductor recommends that analog power planes are placed in a manner such that coupling

with the digital power planes is minimized.

6. I/O signals voltage must be configured to match VDD_IO voltage to minimize any leakage currents.

EXTCLK

From

Controller

VDD_IO VDD

VDD_PLL VAA

Controller

Digital I/0

Power1

Digital

Core

Power1

HiSPi

Power1

PLL

Power1

Analog

Power1

Analog

Power1

VDD_IO

VDD

VDD_SLVS

VDD_PLL

VAA

AGND

SLVSC_N

SLVSC_P

SLVS0_P

SLVS0_N

SLVS1_P

SLVS1_N

SLVS2_P

SLVS2_N

SLVS3_P

SLVS3_N

SHUTTER

FLASH

SDATA

SCLK

RESET_BAR

TEST

TRIGGER

OE_BAR

SADDR

VAA_PIX

AR0331 Datasheet(PDF) 4 Page - ON Semiconductor

AR0331 Datasheet(HTML) 4 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL