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EP7209 Datasheet(PDF) 16 Page - Cirrus Logic |
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EP7209 Datasheet(HTML) 16 Page - Cirrus Logic |
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16 / 128 page ![]() EP7209 16 DS453PP2 2.2.2 SSI/Codec/DAI Pin Multiplexing Boundary Scan TDI I JTAG data in TDO O JTAG data out TMS I JTAG mode select TCLK I JTAG clock nTRST I JTAG async reset Test nTEST[0:1] I Test mode select inputs. These pins are used in conjunction with the power-on latched state of nURESET to select between the various device test models. Oscillators MOSCIN MOSCOUT RTCIN RTCOUT I O I O Main 3.6864 MHz oscillator for 18.432 MHz–73.728 MHz PLL Real Time Clock 32.768 kHz oscillator No connects N/C No connects should be left as no connects; do not connect to ground 1. All deglitched inputs are via the 16.384 kHz clock. Each deglitched signal must be held active for at least two clock periods. Therefore, the input signal must be active for at least ~125 µs to be detected cleanly. NOTE: The RTC crystal must be populated for the device to function properly. SSI2 Codec DAI Direction Strength SSICLK PCMCLK SCLK I/O 1 SSITXFR PCMSYNC LRCK I/O 1 SSITXDA PCMOUT SDOUT Output 1 SSIRXDA PCMIN SDIN Input SSIRXFR p/u* MCLK I/O 1 * p/u = use an ~10 k pull-up The selection between SSI2 and the codec is controlled by the state of the SERSEL bit in SYSCON2 (See SYSCON2 System Control Register 2). The choice between the SSI2, codec, and the DAI is controlled by the DAISEL bit in SYSCON3 (See SYSCON3 System Control Register 3). Table 5. SSI/Codec/DAI Pin Multiplexing Function Signal Name Signal Description Table 4. External Signal Functions (cont.) |
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