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EP7209 Datasheet(PDF) 18 Page - Cirrus Logic

Part # EP7209
Description  Ultra-Low-Power Audio Decoder System-on-Chip
PDF  128 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

EP7209 Datasheet(HTML) 18 Page - Cirrus Logic

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EP7209
18
DS453PP2
3. FUNCTIONAL DESCRIPTION
The EP7209 device is a single-chip embedded con-
troller designed to be used in low cost and ultra-
low-power digital audio players. Operating at
74 MHz, the EP7209 delivers approximately
66 Dhrystone 2.1 MIPS of sustained performance
(74 MIPS peak). This is approximately the same as
a 100 MHz Pentium-based PC.
The EP7209 contains the following functional
blocks:
•
ARM720T processor which consists of the fol-
lowing functional sub-blocks:
-
ARM7TDMI CPU core (which supports
the logic for the Thumb instruction set, core
debug, enhanced multiplier, JTAG, and the
Embedded ICE) running at a dynamically
programmable clock speed of 18 MHz,
36 MHz, 49 MHz, or 74 MHz.
-
Memory Management Unit (MMU) com-
patible with the ARM710 core (providing
address translation and a 64 entry transla-
tion lookaside buffer) with added support
for Windows CE.
-
8 kbytes of unified instruction and data
cache with a four-way set associative cache
controller.
-
Write buffer
•
38,400 bytes (0x9600) of on-chip SRAM that
can be shared between the LCD controller and
general application use.
•
Memory interfaces for up to 6 independent
256 Mbyte expansion segments with program-
ming wait states.
•
27 bits of general purpose I/O - multiplexed to
provide additional functionality where neces-
sary.
•
Digital Audio Interface (DAI) for connection to
CD-quality DACs and codecs.
•
Interrupt controller
•
Advanced system state control and power man-
agement.
•
Two full-duplex 16550A compatible UARTs
with 16-byte transmit and receive FIFOs.
•
IrDA SIR protocol controller capable of speeds
up to 115.2 kbps.
•
Programmable 1-, 2-, or 4-bit-per-pixel LCD
controller with 16-level gray scaler.
•
Programmable frame buffer start address, al-
lowing a system to be built using only internal
SRAM for memory.
•
On-chip boot ROM programmed with serial
load boot sequence.
•
Two 16-bit general purpose timer counters.
•
A 32-bit Real Time Clock (RTC) and compar-
ator.
•
Dedicated LED flasher pin driven from the
RTC with programmable duty ratio (multi-
plexed with a GPIO pin).
•
Two synchronous serial interfaces for Micro-
wire or SPI peripherals such as ADCs, one sup-
porting both the master and slave mode and the
other supporting only the master mode.
•
Full JTAG boundary scan and Embedded ICE
support.
•
Two programmable pulse-width modulation
interfaces.
•
An interface to one or two Cirrus Logic CL-
PS6700 PC Card controller devices to support
two PC Card slots.



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