16-Bit, 250Msps, High-Dynamic-Performance,

Dual DAC with LVDS Inputs

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9

Pin Description

PIN

NAME

FUNCTION

1

B4N

Complementary Data Bit 4

2

B3P

Data Bit 3

3

B3N

Complementary Data Bit 3

4

B2P

Data Bit 2

5

B2N

Complementary Data Bit 2

6

B1P

Data Bit 1

7

B1N

Complementary Data Bit 1

8

B0P

Data Bit 0 (LSB)

9

B0N

Complementary Data Bit 0 (LSB)

10, 12, 13, 15,

20, 23, 26, 27,

30, 33, 36

GND

Ground

11

Digital Supply Voltage. Accepts a 3.135V to 3.465V supply voltage range. Bypass with a 0.1µF

capacitor to GND.

14, 21, 22, 31,

32

Analog Supply Voltage. Accepts a 3.135V to 3.465V supply voltage range. Bypass each pin with

a 0.1µF capacitor to GND.

16

REFIO

Reference I/O. Output of the internal 1.2V precision bandgap reference. Bypass with a 1µF

capacitor to GND. REFIO can be driven with an external reference source. See Table 1.

17

FSADJ

Full-Scale Adjust Input. This input sets the full-scale output current of the DAC. For a 20mA full-

scale output current, connect a 2k

Ω resistor between FSADJ and DACREF. See Table 1.

18

DACREF

Current-Set Resistor Return Path. Internally connected to GND. Do not use as an external

ground connection.

19, 34

Analog Supply Voltage. Accepts a 1.71V to 1.89V supply voltage range. Bypass each pin with a

0.1µF capacitor to GND.

24

OUTQN

Complementary Q-DAC Output. Negative terminal for current output.

25

OUTQP

Q-DAC Output. Positive terminal for current output.

28

OUTIN

Complementary I-DAC Output. Negative terminal for current output.

29

OUTIP

I-DAC Output. Positive terminal for current output.

35

Clock Supply Voltage. Accepts a 3.135V to 3.465V supply voltage range. Bypass with a 0.1µF

capacitor to GND.

37

CLKN

Complementary Converter Clock Input. Negative input terminal for differential converter clock.

38

CLKP

Converter Clock Input. Positive input terminal for differential converter clock. Internally biased to

39

TORB

Two’s-Complement/Binary Select Input. Set TORB to a CMOS-logic-high level to indicate a two’s-

complement input format. Set TORB to a CMOS-logic-low level to indicate a binary input format.

TORB has an internal pulldown resistor.