MAX5877 datasheet(5/18 Pages) MAXIM

5 / 18 page

16-Bit, 250Msps, High-Dynamic-Performance,

Dual DAC with LVDS Inputs

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVDD3.3 = DVDD3.3 = AVCLK = +3.3V, AVDD1.8 = DVDD1.8 = +1.8V, GND = 0, fCLK = 2 x fDAC, external reference VREFIO = +1.25V, out-

put load 50

Ω double-terminated, transformer-coupled output, IOUTFS = 20mA, TA = TMIN to TMAX, unless otherwise noted. Typical values

are at TA = +25°C.) (Note 2)

Note 2: Specifications at TA

≥ +25°C are guaranteed by production testing. Specifications at TA < +25°C are guaranteed by design.

Note 3: Nominal full-scale current IOUTFS = 32 x IREF.

Note 4: This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5878.

Note 5: Parameter measured single-ended into a 50

Ω termination resistor.

Note 6: Not production tested. Guaranteed by design.

Note 7: No termination resistance between XORP and XORN.

Note 8: A differential clock input slew rate of >100V/µs is required to achieve the specified dynamic performance.

Note 9: Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Differential Input Slew Rate

SRCLK

(Note 8)

>100

V/µs

External Common-Mode Voltage

Range

VCOM

AVCLK / 2

±0.3

Input Resistance

RCLK

Ω

Input Capacitance

CCLK

2.5

POWER SUPPLIES

AVDD3.3

3.135

3.3

3.465

Analog Supply Voltage Range

AVDD1.8

1.710

1.8

1.890

DVDD3.3

3.135

3.3

3.465

Digital Supply Voltage Range

DVDD1.8

1.710

1.8

1.890

fDAC = 250Msps, fOUT = 16MHz

IAVDD3.3

Power-down

µA

fDAC = 250Msps, fOUT = 16MHz

Analog Supply

Current

IAVDD1.8

Power-down

µA

fDAC = 250Msps, fOUT = 16MHz

0.2

IDVDD3.3

Power-down

µA

fDAC = 250Msps, fOUT = 16MHz

Digital Supply

Current

IDVDD1.8

Power-down

µA

fDAC = 250Msps, fOUT = 16MHz

296

324

Power Dissipation

PDISS

Power-down

µW

Power-Supply

Rejection Ratio

PSRR

AVDD3.3 = AVCLK = DVDD3.3 = +3.3V

±5%

(Notes 8, 9)

-0.1

+0.1

%FS/V

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