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MP8865 Datasheet(PDF) 3 Page - Monolithic Power Systems |
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MP8865 Datasheet(HTML) 3 Page - Monolithic Power Systems |
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3 / 29 page ![]() MP8865 – SYNCHRONOUS STEP-DOWN CONVERTER MP8865 Rev. 1.03 www.MonolithicPower.com 3 1/18/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. PACKAGE REFERENCE TOP VIEW FB SS VCC 11 12 13 4 5 6 7 PG SDA SCL ADD 14 AGND VOUT 3 EN/SYNC 15 2 BST 1 SW 10 PGND 9 VIN 8 PGND QFN-15 (3mmx3mm) ABSOLUTE MAXIMUM RATINGS (1) VIN …………………………….. ........-0.3V to 22V VSW……………………………………………………………………………… -0.3V (-5V for <10ns) to VIN+0.3V (27V for <25ns) VBST ……………………………. .. VSW+5.5V All Other Pins……………… ....... -0.3V to 5.4V (2) Continuous Power Dissipation (TA = +25°C) (3) ………………………………………………...2.5W Junction Temperature ………………….….150°C Lead Temperature…………………………260°C Storage Temperature ……………-65°C to 150°C Recommended Operating Conditions (4) Supply Voltage VIN…………………..4.5V to 21V Output Voltage VOUT………… ............................. ………………………0.6V to VIN x DMAX or 5.2V(5) Operating Junction Temp. (TJ). -40°C to +125°C Thermal Resistance (6) θJA θJC QFN-15 (3mm x3mm)….. ...... …50…12…°C/W Notes: 1) Exceeding these ratings may damage the device. 2) Please refer to the “Enable/SYNC” control section on page 15 for the absolute maximum rating of EN. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to- ambient thermal resistance θ JA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) The output voltage CANNOT exceed the 5.2V absolute maximum value at any input condition. 6) Measured on JESD51-7, 4-layer PCB. |
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