EM78P257AM datasheet(60/91 Pages) EMC

60 / 91 page

EM78P257

OTP ROM

This specification is subject to change without prior notice.

07.27.2004 (V1.4)

TCCBIF

1: overflow

H/W Modulator

IR OUT

TCCBH

(MSB Counter)

TCCBL

(LSB Counter)

Low-Time

Pulse Timer

Fosco

DP0

DP1

MF0

MF1

Fosc

Duty:Period

PWM

LGP

IRE

1:2

1:3

1:4

÷1

÷4

÷8

High-Time

<Note> In software design, Low-time and High-time registers cannot set “0” at initial state.

Fig. 27 Hardware Modulator

2. Function Description

The following describes the function of each block and single for Fig.27 which depicts how to complete IR kernel

(hardware modulator).

Low-time Register

The 8-bit Low-time register controls the active or Low period of the pulse.

The decimal value of its contents determines the number of oscillator cycles indicating

that the IR OUT pin is active. The active period of IR OUT can be calculated as follow:

tLow=(decimal value held in Low-time register)/fosco

High-time Register

The 8-bit High-time register control the inactive or High period of the pulse.

The decimal value of its contents determines the number of oscillator cycles indicating

that the IR OUT pin is active. The inactive period of IR OUT can be calculated as follow:

tHigh=(decimal value held in High-time register)/fosco

Pulse Timer

The contents of the Low-time and High-time Latch registers are loaded alternately into

the Pulse timer. When loaded, the Pulse timer contents are decremented by “1” every

oscillator cycle and upon reaching zero, the Pulse timer will be loaded with the contents

of the other register.

IR control register

Contains the bits that control various possibilities for the output pulse

EM78P257AM Datasheet(PDF) 60 Page - ELAN Microelectronics Corp

EM78P257AM Datasheet(HTML) 60 Page - ELAN Microelectronics Corp

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