MP163 datasheet(18/23 Pages) MPS

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MP163 – 700V, NON-ISOLATED, OFFLINE REGULATOR WITH INTEGRATED LDO

MP163 Rev. 1.01

www.MonolithicPower.com

8/11/2017

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

PCB Layout Guidelines

Efficient PCB layout is critical for

stable

operation, good EMI, and

good thermal

performance. For best results,

refer to Figure

9 and follow the guidelines below.

1) Minimize the loop area formed by the input

capacitor, IC, freewheeling diode, inductor,

and output capacitor.

2) Place the power inductor far away from the

input filter while keeping the loop area to

the inductor at a minimum.

3) Place a capacitor valued at several hundred

pF between FB and SOURCE as close to

the IC as possible.

4) Connect the exposed pads or large copper

area with DRAIN to improve thermal

performance.

Top Layer

Bottom Layer

Figure 9: Recommended Layout

Design Example

Table

2 shows a design example for the

following application guideline specifications

Table 2: Design Example

VIN

85VAC to 265VAC

VOUT1

12V

IOUT1

200mA

VOUT2

IOUT2

50mA

The detailed application schematic is shown in

Figure

10. The typical performance and circuit

waveforms

are

shown

the

Typical

Performance

Characteristics

section.

For

additional device applications, please refer to

the related evaluation board datasheets.

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