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MP2953B Datasheet(PDF) 24 Page - Monolithic Power Systems

Part # MP2953B
Description  Digital Multi-Phase Controller with PMBus Interface for VR12.5
PDF  30 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP2953B Datasheet(HTML) 24 Page - Monolithic Power Systems

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MP2953B – DIGITAL PWM CONTROLLER WITH PMBUS FOR VR12.5
MP2953B Rev. 1.01
www.MonolithicPower.com
24
10/9/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
Over-Current Protection (OCP)
The MP2953B utilizes the valley point over-
current limit method to limit each phase current.
If the present phase current is higher than the
setting valley point, then this phase will not turn
on until its current falls below the setting level. If
the present phase is blocked for 150ns, then
the next phase will turn on instead so as to
regulate the output voltage at the set point.
The valley point over-current level can be
programmed via the PMBus to limit the per-
phase current.
The total current protection is triggered if the
sensed average total current is higher than the
OC threshold.
Since this protection averages the output
current over many switching cycles, the
average current OCP threshold can be set very
close to the expected maximum output load for
accurate over-current protection.
Fig. 14 shows the OCP process for total current
protection. The total current protection is
disabled during the soft-start process, and it is
enabled when soft start has finished.
Vout
CCM
PWM
VRRDY
OC
OCP
Iphase
Phase_OCP_LIM
Iout
500
us
Total_OCP_LIM
FIGURE 14. OC Protection for Total Current
Fig. 15 shows the process when the output is
shorted to ground. During this process, per-
phase OCP limits the phase current. After
a pre-set time, the VR is shut off by the total
current OCP.
FIGURE 15. OCP with Output Dead Short
Under-Voltage Protection (UVP)
If the output voltage is below VID – 300mV for a
given time, the system triggers UVP and
immediately shuts down by turning off all
phases.
Fig. 16 shows the UVP process.
Normally, UVP is triggered when PWM signals
are blocked by the OC signals (when the per-
phase current limit is reached) as shown in Fig.
17.
FIGURE 16. Under-Voltage Protection



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