MP2953B – DIGITAL PWM CONTROLLER WITH PMBUS FOR VR12.5

MP2953B Rev. 1.01

www.MonolithicPower.com

7

10/9/2015

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unless otherwise noted.

Parameter

Symbol Condition

Min

Typ

Max

Units

SVID Interface

(5)

Logic Low

0.45

V

Logic High

0.65

V

CPU Interface Voltage

(SDIO, SCLK)

Hysteresis

50

mV

Termination Resistance

(SDIO, SCLK, ALT#)

(5)

50

55

TBD

Ω

Leakage Current

(SDIO, SCLK, ALT#)

IL

0V to VTT

-10

10

μA

Pad Capacitance

(SDIO, SCLK, ALT#)

4

pF

Pin Capacitance

(SDIO, SCLK, ALT#)

(5)

5

pF

Buffer On Resistance

(SDIO, SCLK, ALT#)

(5)

4

5

Ω

Maximum voltage

(SDIO, SCLK, ALT#)

Transient Voltage including

Ringing

-0.3

2.1

V

Slew Rate

(SDIO, SCLK, ALT#)

(5)

2nH, 4pF Load

0.5

2

V/ns

VR Clock to Data Delay

(5)

4

8.3

ns

Setup Time

7

ns

Hold Time

14

ns

DAC (Reference Voltage)

Range

2.88

V

Resolution per LSB

10

mV

Output Voltage Slew Rate

(5)

100

mV/μs

DAC (Vout Calibration)

Range

350

mV

Resolution

8

bit

DAC (Protection)

Range

Adjustable via the PMBus

0.97~3.54

V

Resolution

10

mV