MP2953B – DIGITAL PWM CONTROLLER WITH PMBUS FOR VR12.5

MP2953B Rev. 1.01

www.MonolithicPower.com

11

10/9/2015

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PIN FUNCTIONS

Pin #

Name

I/O

Description

1

CS5

I

Phase 5 Current Sense Input. Float CS of the unused phase.

2

CS4

I

Phase 4 Current Sense Input. Float CS of the unused phase.

3

CS3

I

Phase 3 Current Sense Input. Float CS of the unused phase.

4

CS2

I

Phase 2 Current Sense Input. Float CS of the unused phase.

5

CS1

I

Phase 1 Current Sense Input.

6

VDIFF

O

Differential Remote Sense Amplifier Output.

7

FB

I/O

Feedback. FB sources a current proportional to the sensed output current

(Idroop). This current flows through the resistor between FB and VDIFF to create

a voltage drop proportional to the load current. Ensure the resistor between

VDIFF and FB has a value that will set a proper load line.

8

VOSEN

I

Positive Remote Voltage Sense Input. VOSEN is connected directly to the VR

output voltage at the load and should be routed differentially with VORTN.

9

VORTN

I

Remote Voltage Sensing Return Input. VORTN is connected directly to

ground at the load and should be routed differentially with VOSEN.

10

CS_SUM

I

Total Phase Current, which Monitors AVP. Connect the active phase CS

signal to CS_SUM through current-sense resistors.

11

VBOOT

I/O

Boot Voltage Setting.

12

IMON

I/O

Analog Total Load Current Signal. IMON sources a current proportional to the

sensed total load current from CS_SUM. Connect an external resistor from

IMON to GND to program the gain.

13

TEMP

I

Analog Signal from the VR to the VID Controller to Indicate the Power

Stage Temperature. The MP2953B only supports temperature sensing from

Intelli-Phase. Connect all of Intelli-Phase’s VTEMP pins together to produce the

maximum junction temperature and then connect to TEMP.

14

VFS

I/O

Switching Frequency Setting.

15

VINSEN

I

Input Voltage Sensing. Connect VINSEN to the system input voltage through a

resistor divider.

16

ADDR_P

I/O

PMBus Address Setting.

17

ADDR_S

I/O

SVID Address Setting.

18

IREF

I

Internal Bias Current. Connect an 61.9kΩ resistor from IREF to GND.

19

VDD18

O

1.8V LDO Output for Current Sense. Connect a 1µF bypass capacitor to

digital ground.

20

VDD50

I

5V Analog Power Supply. Connect a 10µF bypass capacitor to digital ground.

21

SCLK

I

Source Synchronous Clock from the CPU. Frequency range from 10MHz to

26MHz.

22

SDIO

I/O

Data Signal between the CPU and VID Controller.

23

ALT#

O

Alert. ALT# is an open-drain output. It is the alert signal from the VID controller

to the CPU.