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LTM4650A

4650afb

For more information www.linear.com/LTM4650A

APPLICATIONS INFORMATION

Frequency Selection and Phase-Lock Loop

(MODE_PLLIN and fSET Pins)

The LTM4650A device is operated over a range of frequen-

cies to improve power conversion efficiency. It is recom-

mended to operate the module at 300kHz to 750kHz over

different input and output range for the best efficiency and

inductor current ripple.

The LTM4650A switching frequency can be set with an

external resistor from the fSET pin to SGND. An accurate

10µA current source into the resistor will set a voltage

that programs the frequency or a DC voltage can be

applied. Figure 5 shows a graph of frequency setting

verses programming voltage. An external clock can be

applied to the MODE_PLLIN pin from 0V to INTVCC over

a frequency range of 250kHz to 780kHz. The clock input

high threshold is 1.6V and the clock input low threshold

is 1V. The LTM4650A has the PLL loop filter components

on board. The frequency setting resistor should always

be present to set the initial switching frequency before

locking to an external clock. Both regulators will operate

in continuous mode while being externally clock.

The output of the PLL phase detector has a pair of comple-

mentary current sources that charge and discharge the

internal filter network. When the external clock is applied

then the fSET frequency resistor is disconnected with

an internal switch, and the current sources control the

frequency adjustment to lock to the incoming external

clock. When no external clock is applied, then the internal

switch is on, thus connecting the external fSET frequency

set resistor for free run operation.

Minimum On-Time

Minimum on-time tON is the smallest time duration that

the LTM4650A is capable of turning on the top MOSFET on

either channel. It is determined by internal timing delays,

and the gate charge required turning on the top MOSFET.

Low duty cycle applications may approach this minimum

on-time limit and care should be taken to ensure that:

VOUT

VIN •FREQ

> tON(MIN)

If the duty cycle falls below what can be accommodated

by the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the output ripple and current will increase. The on-time

can be increased by lowering the switching frequency. A

good rule of thumb is to keep on-time longer than 110ns.

Soft-Start And Output Voltage Tracking

The TRACK/SS pin provides a means to either soft-start

the regulator or track it to a different power supply. A ca-

pacitor on the TRACK/SS pin will program the ramp rate

of the output voltage. An internal 1.3µA current source

will charge up the external soft-start capacitor towards

INTVCC voltage. When the TRACK/SS voltage is below

0.6V, it will take over the internal 0.6V reference voltage

to control the output voltage. The total soft-start time can

be calculated as:

tSS = 0.6 •

CSS

1.3µA

where CSS is the capacitance on the TRACK/SS pin. Cur-

rent foldback and forced continuous mode are disabled

during the soft-start process.

Figure 5. Operating Frequency vs fSET Pin Voltage

fSET PIN VOLTAGE (V)

900

800

600

400

100

200

700

500

300

4650A F05

2.5

1.5

0.5

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