LTC2602 datasheet(12/26 Pages) LINER

12 / 26 page

LTC2323-16

232316fc

For more information www.linear.com/LTC2323-16

APPLICATIONS INFORMATION

protection. In the acquisition phase, 10pF (CIN) from the

sampling capacitor in series with approximately 15Ω

(RON) from the on-resistance of the sampling switch is

connected to the input. Any unwanted signal that is com-

mon to both inputs will be reduced by the common mode

rejection of the ADC sampler. The inputs of the ADC core

draw a small current spike while charging the CIN capaci-

tors during acquisition.

Single-Ended Signals

Single-ended signals can be directly digitized by the

LTC2323-16. These signals should be sensed pseudo-

differentially for improved common mode rejection. By

connecting the reference signal (e.g., ground sense) of

the main analog signal to the other AIN pin, any noise or

disturbance common to the two signals will be rejected

by the high CMRR of the ADC. The LTC2323-16 flexibil-

ity handles both pseudo-differential unipolar and bipolar

signals, with no configuration required. The wide common

mode input range relaxes the accuracy requirements of

any signal conditioning circuits prior to the analog inputs.

Pseudo-Differential Bipolar Input Range

The pseudo-differential bipolar configuration represents

driving one of the analog inputs at a fixed voltage, typi-

cally VREF/2, and applying a signal to the other AIN pin. In

this case the analog input swings symmetrically around

the fixed input yielding bipolar two’s complement output

codes with an ADC span of half of full-scale. This con-

figuration is illustrated in Figure 4, and the corresponding

transfer function in Figure 5. The fixed analog input pin

need not be set at VREF/2, but at some point within the VDD

rails allowing the alternate input to swing symmetrically

around this voltage. If the input signal (AIN+ – AIN–) swings

beyond ±REFOUT1,2/2, valid codes will be generated by

the ADC and must be clamped by the user, if necessary.

Figure 4. Pseudo-Differential Bipolar Application Circuit

Figure 5. Pseudo-Differential Bipolar Transfer Function

220pF

VREF

VREF/2

VREF

10k

ONLY CHANNEL 1 SHOWN FOR CLARITY

–

LTC2323-16

LT1819

232316 F04

SD01

VBYP1

REFOUT1

CLKOUT

AIN1–

AIN1+

SCK

TO CONTROL

LOGIC

(FPGA, CPLD,

DSP, ETC.)

1µF

10µF

1µF

232316 F05

–VREF

–16385

16384

–32768

32767

VREF

DOTTED REGIONS AVAILABLE

BUT UNUSED

AIN

(AIN+ – AIN–)

ADC CODE

(2’s COMPLEMENT)

–VREF/2

VREF/2

LTC2602 Datasheet(PDF) 12 Page - Linear Technology

LTC2602 Datasheet(HTML) 12 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Datasheet Download

Link URL