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TPS61372 Datasheet(PDF) 24 Page - Texas Instruments |
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TPS61372 Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 35 page ![]() CH2: EN 2.0 V / div CH1: VOUT 5.0 V / div CH4: Load 1.0 A / div CH2: EN 2 V / div CH1: VOUT 5 V / div CH4: Load 1 A / div CH1: VOUT_AC 20 mV / div CH3: SW 5.0 V / div CH4: IL 1.0 A / div CH1: VOUT_AC 50 mV / div CH2: SW 7.0 V / div CH4: IL 1.0 A / div 24 TPS61372 SLVSEE7 – JUNE 2018 www.ti.com Product Folder Links: TPS61372 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 9.2.3.4.3 Selecting the Bootstrap Capacitor The bootstrap capacitor between the BST and SW pin supplies the gate current to charge the high-side FET device gate during each cycle’s turn-on and also supplies charge for the bootstrap capacitor. The recommended value of the bootstrap capacitor is 20 nF to 200 nF. CBST should be a good quality, low ESR, ceramic capacitor located at the pins of the device to minimize potentially damaging voltage transients caused by trace inductance. A value of 100 nF is selected for this design example. 9.2.4 TPS61372 Application Waveform Typical condition VIN = 3 V to 4.5 V, VOUT = 12 V, Temp = 25°C, unless otherwise noted VIN = 4 V VOUT= 12 V Mode = Auto PFM L = 2.2 µH COUT= 3 × 10 µF Figure 17. Steady-state at 200 mA Load VIN = 4 V VOUT= 12 V Mode = Auto PFM L = 2.2 µH COUT= 3 × 10 µF Figure 18. Steady-state at 10 mA Load VIN = 4 V VOUT= 12 V Mode = Auto PFM L = 2.2 µH COUT= 3 × 10 µF Figure 19. Startup by EN, Load = 12.5 Ω VIN = 4 V VOUT= 12 V Mode = Auto PFM L = 2.2 µH COUT= 3 × 10 µF Figure 20. Shutdown by EN, Load = 12.5 Ω |
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